Using Model Checker to Analyze and Test Digital Circuits with Regard to Delay Faults

Josef Strnadel. Using Model Checker to Analyze and Test Digital Circuits with Regard to Delay Faults. In Muhammad Shafique 0001, Andreas Steininger, Lukás Sekanina, Milos Krstic, Goran Stojanovic, Vojtech Mrazek, editors, 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2021, Vienna, Austria, April 7-9, 2021. pages 111-114, IEEE, 2021. [doi]

Abstract

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