An on Chip Network inside a FPGA for Run-Time Reconfigurable Low Latency Grid Communication

Jochen Strunk, Toni Volkmer, Wolfgang Rehm, Heiko Schick. An on Chip Network inside a FPGA for Run-Time Reconfigurable Low Latency Grid Communication. In Antonio Núñez, Pedro P. Carballo, editors, 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2009, 27-29 August 2009, Patras, Greece. pages 539-546, IEEE Computer Society, 2009. [doi]

@inproceedings{StrunkVRS09-0,
  title = {An on Chip Network inside a FPGA for Run-Time Reconfigurable Low Latency Grid Communication},
  author = {Jochen Strunk and Toni Volkmer and Wolfgang Rehm and Heiko Schick},
  year = {2009},
  doi = {10.1109/DSD.2009.133},
  url = {http://doi.ieeecomputersociety.org/10.1109/DSD.2009.133},
  researchr = {https://researchr.org/publication/StrunkVRS09-0},
  cites = {0},
  citedby = {0},
  pages = {539-546},
  booktitle = {12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2009, 27-29 August 2009, Patras, Greece},
  editor = {Antonio Núñez and Pedro P. Carballo},
  publisher = {IEEE Computer Society},
  isbn = {978-0-7695-3782-5},
}