An on Chip Network inside a FPGA for Run-Time Reconfigurable Low Latency Grid Communication

Jochen Strunk, Toni Volkmer, Wolfgang Rehm, Heiko Schick. An on Chip Network inside a FPGA for Run-Time Reconfigurable Low Latency Grid Communication. In Antonio Núñez, Pedro P. Carballo, editors, 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2009, 27-29 August 2009, Patras, Greece. pages 539-546, IEEE Computer Society, 2009. [doi]

Abstract

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