Pseudo parallel architecture for AES with error correction

Yi Xin Su, Jimson Mathew, Jawar Singh, Dhiraj K. Pradhan. Pseudo parallel architecture for AES with error correction. In 21st Annual IEEE International SoC Conference, SoCC 2008, September 17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings. pages 187-190, IEEE, 2008. [doi]

Abstract

Abstract is missing.