Optimization of Test Accesses with a Combined BIST and External Test Scheme

Makoto Sugihara, Hiroto Yasuura. Optimization of Test Accesses with a Combined BIST and External Test Scheme. In Proceedings of the ASPDAC 2002 / VLSI Design 2002, CD-ROM, 7-11 January 2002, Bangalore, India. pages 683-688, IEEE Computer Society, 2002. [doi]

@inproceedings{SugiharaY02,
  title = {Optimization of Test Accesses with a Combined BIST and External Test Scheme},
  author = {Makoto Sugihara and Hiroto Yasuura},
  year = {2002},
  url = {http://csdl.computer.org/comp/proceedings/vlsid/2002/1441/00/14410683abs.htm},
  tags = {optimization, testing},
  researchr = {https://researchr.org/publication/SugiharaY02},
  cites = {0},
  citedby = {0},
  pages = {683-688},
  booktitle = {Proceedings of the ASPDAC 2002 / VLSI Design 2002, CD-ROM, 7-11 January 2002, Bangalore, India},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-1299-2},
}