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Yasuhiro Sugimoto, Kazuma Sakatoh. Circuit Techniques to Enhance Linearity and Intrinsic Gain to Realize a 1.2 V, 200 MHz, +10.3 dBm IIP3 and 7th-Order LPF in a 65 nm CMOS. IEICE Transactions, 96-C(6):867-874, 2013. [doi]
Abstract is missing.