Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions - researchr publication

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G. Edward Suh, Charles W. O Donnell, Ishan Sachdev, Srinivas Devadas. Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions. In 32st International Symposium on Computer Architecture (ISCA 2005), 4-8 June 2005, Madison, Wisconsin, USA. pages 25-36, IEEE Computer Society, 2005. [doi]

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