Transistor and Pin Reordering for Gate Oxide Leakage Reduction in Dual T{ox} Circuits

Anup Kumar Sultania, Dennis Sylvester, Sachin S. Sapatnekar. Transistor and Pin Reordering for Gate Oxide Leakage Reduction in Dual T{ox} Circuits. In 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings. pages 228-233, IEEE Computer Society, 2004. [doi]

@inproceedings{SultaniaSS04:0,
  title = {Transistor and Pin Reordering for Gate Oxide Leakage Reduction in Dual T{ox} Circuits},
  author = {Anup Kumar Sultania and Dennis Sylvester and Sachin S. Sapatnekar},
  year = {2004},
  url = {http://csdl.computer.org/comp/proceedings/iccd/2004/2231/00/22310228abs.htm},
  researchr = {https://researchr.org/publication/SultaniaSS04%3A0},
  cites = {0},
  citedby = {0},
  pages = {228-233},
  booktitle = {22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2231-9},
}