Transistor and Pin Reordering for Gate Oxide Leakage Reduction in Dual T{ox} Circuits

Anup Kumar Sultania, Dennis Sylvester, Sachin S. Sapatnekar. Transistor and Pin Reordering for Gate Oxide Leakage Reduction in Dual T{ox} Circuits. In 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings. pages 228-233, IEEE Computer Society, 2004. [doi]

Abstract

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