Xun Sun, Akshat Boora, Wenbing Zhang, Venkata Rajesh Pamula, Visvesh S. Sathe. A 0.6-to-1.1V Computationally Regulated Digital LDO with 2.79-Cycle Mean Settling Time and Autonomous Runtime Gain Tracking in 65nm CMOS. In IEEE International Solid- State Circuits Conference, ISSCC 2019, San Francisco, CA, USA, February 17-21, 2019. pages 230-232, IEEE, 2019. [doi]
Abstract is missing.