Abstract is missing.
- Deep Learning Hardware: Past, Present, and FutureYann LeCun. 12-19 [doi]
- Intelligence on Silicon: From Deep-Neural-Network Accelerators to Brain Mimicking AI-SoCsHoi-Jun Yoo. 20-26 [doi]
- Integration of Photonics and ElectronicsMeint Smit, Kevin Williams, Jos van der Tol. 29-34 [doi]
- 5G Wireless Communication: An Inflection PointVida Ilderem. 35-39 [doi]
- Summit and Sierra: Designing AI/HPC SupercomputersJames A. Kahle, Jaime Moreno, Daniel Dreps. 42-43 [doi]
- A 978GOPS/W Flexible Streaming Processor for Real-Time Image Processing Applications in 22nm FDSOISander Smets, Toon Goedemé, Anurag Mittal, Marian Verhelst. 44-46 [doi]
- An Energy-Efficient Configurable Lattice Cryptography Processor for the Quantum-Secure Internet of ThingsUtsav Banerjee, Abhishek Pathak, Anantha P. Chandrakasan. 46-48 [doi]
- A Distributed Autonomous and Collaborative Multi-Robot System Featuring a Low-Power Robot SoC in 22nm CMOS for Integrated Battery-Powered MinibotsVinayak Honkote, Dileep Kurian, Sriram Muthukumar, Dibyendu Ghosh, Satish Yada, Kartik Jain, Bradley Jackson, Ilya Klotchkov, Mallikarjuna Rao Nimmagadda, Shreela Dattawadkar, Pranjali Deshmukh, Ankit Gupta, Jaykant Timbadiya, Ravi Pali, Karthik Narayanan, Saksham Soni, Saransh Chhabra, Praveen Dhama, N. Sreenivasulu, Jisna Kollikunnel, Sureshbabu Kadavakollu, Vijay Deepak Sivaraj, Paolo A. Aseron, Leonid Azarenkov, Nancy Robinson, Arun Radhakrishnan, Mikhail J. Moiseev, Ganeshram Nandakumar, Akhila Madhukumar, Roman Popov, Kamakhya P. Sahu, Ramesh Peguvandla, Alberto Del Rio Ruiz, Mukesh Bhartiya, Anuradha Srinivasan, Vivek De. 48-50 [doi]
- A 40×40 Four-Neighbor Time-Based In-Memory Computing Graph ASIC Chip Featuring Wavefront Expansion and 2D Gradient ControlLuke R. Everson, Sachin S. Sapatnekar, Chris H. Kim. 50-52 [doi]
- A 2 ×30k-Spin Multichip Scalable Annealing Processor Based on a Processing-In-Memory Approach for Solving Large-Scale Combinatorial Optimization ProblemsTakashi Takemoto, Masato Hayashi, Chihiro Yoshimura, Masanao Yamaoka. 52-54 [doi]
- A 28nm 600MHz Automotive Flash Microcontroller with Virtualization-Assisted Processor for Next-Generation Automotive Architecture Complying with ISO26262 ASIL-DSugako Otani, Norimasa Otsuki, Yasufumi Suzuki, Naoto Okumura, Shohei Maeda, Tomonori Yanagita, Takao Koike, Yasuhisa Shimazaki, Masao Ito, Minoru Uemura, Toshihiro Hattori, Tadaaki Yamauchi, Hiroyuki Kondo. 54-56 [doi]
- A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of DistortionBenjamin P. Hershberg, Davide Dermit, Barend van Liempd, Ewout Martens, Nereo Markulic, Jorge Lagos, Jan Craninckx. 58-60 [doi]
- A 7.6mW 1GS/s 60dB SNDR Single-Channel SAR-Assisted Pipelined ADC with Temperature-Compensated Dynamic Gm-R-Based AmplifierWenning Jiang, Yan Zhu 0001, Minglei Zhang, Chi-Hang Chan, Rui P. Martins. 60-62 [doi]
- A 5GS/s 158.6mW 12b Passive-Sampling 8×-Interleaved Hybrid ADC with 9.4 ENOB and 160.5dB FoMS in 28nm CMOSAthanasios Ramkaj, Juan Carlos Pena Ramos, Yifan Lyu, Maarten Strackx, J. M. Marcel Pelgrom, Michiel Steyaert, Marian Verhelst, Filip Tavernier. 62-64 [doi]
- 2 25µW 2MS/s 74dB-SNDR Continuous-Time Pipelined-SAR ADC with 120fF Input CapacitorLinxiao Shen, Yi Shen, Xiyuan Tang, Chen-Kai Hsu, Wei Shi, Shaolan Li, Wenda Zhao, Abhishek Mukherjee, Nan Sun. 64-66 [doi]
- A 0.6V 13b 20MS/s Two-Step TDC-Assisted SAR ADC with PVT Tracking and Speed-Enhanced TechniquesMinglei Zhang, Chi-Hang Chan, Yan Zhu 0001, Rui P. Martins. 66-68 [doi]
- A 6-to-600MS/s Fully Dynamic Ringamp Pipelined ADC with Asynchronous Event-Driven Clocking in 16nmBenjamin P. Hershberg, Barend van Liempd, Nereo Markulic, Jorge Lagos, Ewout Martens, Davide Dermit, Jan Craninckx. 68-70 [doi]
- A 10mW 16b 15MS/s Two-Step SAR ADC with 95dB DR Using Dual-Deadzone Ring-AmplifierAhmed ElShater, Calvin Yoji Lee, Praveen Kumar Venkatachala, Jason Muhlestein, Spencer Leuenberger, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon. 70-72 [doi]
- A Watt-Level Phase-Interleaved Multi-Subharmonic Switching Digital Power Amplifier Achieving 31.4% Average Drain EfficiencyAoyang Zhang, Mike Shuo-Wei Chen. 74-76 [doi]
- A Broadband Switched-Transformer Digital Power Amplifier for Deep Back-Off Efficiency EnhancementLiang Xiong, Tong Li, Yun Yin, Hao Min, Na Yan, Hongtao Xu. 76-78 [doi]
- A Multiphase Interpolating Digital Power Amplifier for TX Beamforming in 65nm CMOSZhidong Bai, Wen Yuan, Ali Azam, Jeffrey Sean Walling. 78-80 [doi]
- nd-Harmonic-Shorting Four-Way Transformer and Integrated Thermal SensorsInchan Ju, Michael J. McPartlin, Chun-Wen Paul Huang, Clifford D. Y. Cheon, Mark Doherty, John D. Cressler. 80-82 [doi]
- A 13.5dBm Fully Integrated 200-to-255GHz Power Amplifier with a 4-Way Power Combiner in SiGe: C BiCMOSMohamed Hussein Eissa, Dietmar Kissinger. 82-84 [doi]
- A mm-Wave 3-Way Linear Doherty Radiator with Multi Antenna Coupling and On-Antenna Current-Scaling Series Combiner for Deep Power Back-Off Efficiency EnhancementHuy Thong Nguyen, Sensen Li, Hua Wang. 84-86 [doi]
- A Compact DC-to-108GHz Stacked-SOI Distributed PA/Driver Using Multi-Drive Inter-Stack Coupling, Achieving 1.525THz GBW, 20.8dBm Peak P1dB, and Over 100Gb/s in 64-QAM and PAM-4 ModulationOmar El-Aassar, Gabriel M. Rebeiz. 86-88 [doi]
- A Highly Linear Super-Resolution Mixed-Signal Doherty Power Amplifier for High-Efficiency mm-Wave 5G Multi-Gb/s CommunicationsFei Wang, Tso-Wei Li, Hua Wang. 88-90 [doi]
- A 60GHz CMOS Power Amplifier with Cascaded Asymmetric Distributed-Active-Transformer Achieving Watt-Level Peak Output Power with 20.8% PAE and Supporting 2Gsym/s 64-QAM ModulationHuy Thong Nguyen, Doohwan Jung, Hua Wang. 90-92 [doi]
- A Stacked Global-Shutter CMOS Imager with SC-Type Hybrid-GS Pixel and Self-Knee Point Calibration Single Frame HDR and On-Chip Binarization Algorithm for Smart Vision ApplicationsChen Xu, Yaowu Mo, Guanjing Ren, Weijian Ma, Xin Wang, Wenjie Shi, Jinjian Hou, Ke Shao, Haojie Wang, Pengge Xiao, Zexu Shao, Xiao Xie, Xiaoyong Wang, Chris Yiu. 94-96 [doi]
- Energy-Efficient Low-Noise CMOS Image Sensor with Capacitor Array-Assisted Charge-Injection SAR ADC for Motion-Triggered Low-Power IoT ApplicationsKyojin David Choo, Li Xu 0006, Yejoong Kim, Ji-Hwan Seol, Xiao Wu 0002, Dennis Sylvester, David T. Blaauw. 96-98 [doi]
- A Data-Compressive 1.5b/2.75b Log-Gradient QVGA Image Sensor with Multi-Scale Readout for Always-On Object DetectionChristopher Young, Alex Omid-Zohoor, Pedram Lajevardi, Boris Murmann. 98-100 [doi]
- - Random NoiseInjun Park, Chanmin Park, Jimin Cheon, Youngcheol Chae. 100-102 [doi]
- Dual-Tap Pipelined-Code-Memory Coded-Exposure-Pixel CMOS Image Sensor for Multi-Exposure Single-Frame Computational ImagingNavid Sarhangnejad, Nikola Katic, Zhengfan Xia, Mian Wei, Nikita Gusev, Gairik Dutta, Rahul Gulve, Harel Haim, Manuel Moreno Garcia, David Stoppa, Kiriakos N. Kutulakos, Roman Genov. 102-104 [doi]
- A 400×400-Pixel 6μm-Pitch Vertical Avalanche Photodiodes CMOS Image Sensor Based on 150ps-Fast Capacitive Relaxation Quenching in Geiger Mode for Synthesis of Arbitrary Gain ImagesYutaka Hirose, Shinzo Koyama, Toru Okino, Akito Inoue, Shigeru Saito, Yugo Nose, Motonori Ishii, Seiji Yamahira, Shigetaka Kasuga, Mitsuyoshi Mori, Tatsuya Kabe, Kentaro Nakanishi, Manabu Usuda, Akihiro Odagawa, Tsuyoshi Tanaka. 104-106 [doi]
- A 256×256 40nm/90nm CMOS 3D-Stacked 120dB Dynamic-Range Reconfigurable Time-Resolved SPAD ImagerRobert K. Henderson, Nick Johnston, Sam W. Hutchings, István Gyöngy, Tarek Al Abbas, Neale A. W. Dutton, Max Tyler, Susan Chan, Jonathan Leach. 106-108 [doi]
- A 32×32-Pixel 0.9THz Imager with Pixel-Parallel 12b VCO-Based ADC in 0.18μm CMOSSayuri Yokoyama, Masayuki Ikebe, Yuri Kanazawa, Takahiro Ikegami, Prasoon Ambalathankandy, Shota Hiramatsu, Eiichi Sano, Yuma Takida, HIroaki Minamide. 108-110 [doi]
- A 100Gb/s 1.1pJ/b PAM-4 RX with Dual-Mode 1-Tap PAM-4 / 3-Tap NRZ Speculative DFE in 14nm CMOS FinFETAlessandro Cevrero, Ilter Özkaya, Pier Andrea Francese, Matthias Brändli, Christian Menolfi, Thomas Morf, Marcel A. Kossel, Lukas Kull, Danny Luu, Martino Dazzi, Thomas Toifl. 112-114 [doi]
- A 60Gb/s PAM-4 ADC-DSP Transceiver in 7nm CMOS with SNR-Based Adaptive Power Scaling Achieving 6.9pJ/b at 32dB LossMarc-Andre LaCroix, Henry Wong, Yun Hua Liu, Huong Ho, Semyon Lebedev, Petar Krotnev, Dorin Alexandru Nicolescu, Dmitry Petrov, Carlos Carvalho, Stephen Alie, Euhan Chong, Faisal Ahmed Musa, Davide Tonietto. 114-116 [doi]
- A Sub-250mW 1-to-56Gb/s Continuous-Range PAM-4 42.5dB IL ADC/DAC-Based Transceiver in 7nm FinFETMatteo Pisati, Fernando De Bernardinis, Paolo Pascale, Claudio Nani, Marco Sosio, Enrico Pozzati, Nicola Ghittori, Federico Magni, Marco Garampazzi, Giacomino Bollati, Antonio Milani, Alberto Minuti, Fabio Giunco, Paola Uggetti, Ivan Fabiano, Nicola Codega, Alessandro Bosi, Nicola Carta, Demetrio Pellicone, Giorgio Spelgatti, Massimo Cutrupi, Andrea Rossini, Roberto G. Massolini, Giovanni Cesura, Ivan Bietti. 116-118 [doi]
- A 180mW 56Gb/s DSP-Based Transceiver for High Density IOs in Data Center Switches in 7nm FinFET TechnologyTamer Ali, Ramy Yousry, Henry Park, E.-Hung Chen, Po-Shuan Weng, Yi-Chieh Huang, Chun-Cheng Liu, Chien-Hua Wu, Shih Hao Huang, Chungshi Lin, Ke-Chung Wu, Kun-Hung Tsai, Kai-Wen Tan, Ahmed ElShater, Kuang-Ren Chen, Wei-Hao Tsai, Huan-Sheng Chen, Weiyu Leng, Mazen Soliman. 118-120 [doi]
- A 400Gb/s Transceiver for PAM-4 Optical Direct-Detect Application in 16nm FinFETChang-Feng Loi, A. Mellati, A. Tan, A. Farhoodfar, Arun Tiruvur, Belal Helal, Bob Killips, F. Rad, Jamal Riani, Jorge Pernillo, J. Sun, J. Wong, K. Abdelhalim, K. Gopalakrishnan, K. Kim, L. Tse, M. Davoodi, M. Q. Le, M. Zhang, M. Talegaonkar, P. Prabha, Ravindran Mohanavelu, S. Chong, Simon Forey, S. Netto, Sudeep Bhoja, W. Liew, Y. Duan, Y. Liao. 120-122 [doi]
- A 128Gb/s 1.3pJ/b PAM-4 Transmitter with Reconfigurable 3-Tap FFE in 14nm CMOSZeynep Toprak Deniz, Jonathan Proesel, John F. Bulzacchelli, Herschel A. Ainspan, Timothy O. Dickson, Michael P. Beakes, Mounir Meghelli. 122-124 [doi]
- A 112Gb/s PAM-4 Voltage-Mode Transmitter with 4-Tap Two-Step FFE and Automatic Phase Alignment Techniques in 40nm CMOSPen-Jui Peng, Yan-Ting Chen, Sheng-Tsung Lai, Chao-Hsuan Chen, Hsiang-En Huang, Ted Shih. 124-126 [doi]
- A 36Gb/s Adaptive Baud-Rate CDR with CTLE and 1-Tap DFE in 28nm CMOSDanny Yoo, Mohammad Bagherbeik, Wahid Rahman, Ali Sheikholeslami, Hirotaka Tamura, Takayuki Shibasaki. 126-128 [doi]
- An 11.5TOPS/W 1024-MAC Butterfly Structure Dual-Core Sparsity-Aware Neural Processing Unit in 8nm Flagship Mobile SoCJinook Song, Yunkyo Cho, Jun-Seok Park, Jun-Woo Jang, Sehwan Lee, Joon Ho Song, Jae-Gon Lee, Inyup Kang. 130-132 [doi]
- 2 Multicore SoC with DNN Accelerator and Image Signal Processor Complying with ISO26262 for Automotive ApplicationsYutaka Yamada, Toru Sano, Yasuki Tanabe, Yutaro Ishigaki, Soichiro Hosoda, Fumihiko Hyuga, Akira Moriya, Ryuji Hada, Atsushi Masuda, Masato Uchiyama, Tomohiro Koizumi, Takanori Tamai, Nobuhiro Sato, Jun Tanabe, Katsuyuki Kimura, Ryusuke Murakami, Takashi Yoshikawa. 132-134 [doi]
- An 879GOPS 243mW 80fps VGA Fully Visual CNN-SLAM Processor for Wide-Range Autonomous ExplorationZiyun Li, Yu Chen, Luyao Gong, Lu Liu, Dennis Sylvester, David T. Blaauw, Hun-Seok Kim. 134-136 [doi]
- A 2.1TFLOPS/W Mobile Deep RL Accelerator with Transposable PE Array and Experience CompressionChanghyeon Kim, Sanghoon Kang, Dongjoo Shin, Sungpill Choi, YoungWoo Kim, Hoi-Jun Yoo. 136-138 [doi]
- 2and 6T HBST-TRAM-Based 2D Data-Reuse ArchitectureJinshan Yue, Ruoyang Liu, Wenyu Sun, Zhe Yuan, Zhibo Wang, Yung-Ning Tu, Yi-Ju Chen, Ao Ren, Yanzhi Wang, Meng-Fan Chang, Xueqing Li, Huazhong Yang, Yongpan Liu. 138-140 [doi]
- A 65nm 236.5nJ/Classification Neuromorphic Processor with 7.5% Energy Overhead On-Chip Learning Using Direct Spike-Only FeedbackJeongwoo Park, Juyun Lee, Dongsuk Jeon. 140-142 [doi]
- LNPU: A 25.3TFLOPS/W Sparse Deep-Neural-Network Learning Processor with Fine-Grained Mixed Precision of FP8-FP16Jinsu Lee, Juhyoung Lee, Donghyeon Han, Jinmook Lee, Gwangtae Park, Hoi-Jun Yoo. 142-144 [doi]
- A 93.8% Peak Efficiency, 5V-Input, 10A Max ILOAD Flying Capacitor Multilevel Converter in 22nm CMOS Featuring Wide Output Voltage Range and Flying Capacitor PrechargingChristopher Schaef, Sheldon Weng, Beomseok Choi, William Lambert, Kaladhar Radhakrishnan, Krishnan Ravichandran, James Tschanz, Vivek De. 146-148 [doi]
- 2 Power Density and 94% Peak EfficiencyAbdullah Abdulslam, Patrick P. Mercier. 148-150 [doi]
- A 10.9W 93.4%-Efficient (27W 97%-Efficient) Flying-Inductor Hybrid DC-DC Converter Suitable for 1-Cell (2-Cell) Battery Charging ApplicationsCasey Hardy, Hanh-Phuc Le. 150-152 [doi]
- Fully Integrated Buck Converter with 78% Efficiency at 365mW Output Power Enabled by Switched-Inductor Capacitor Topology and Inductor Current Reduction TechniqueNghia Tang, Bai Nguyen, Yangyang Tang, Wookpyo Hong, Zhiyuan Zhou, Deukhyoun Heo. 152-154 [doi]
- A Fully Integrated Voltage Regulator in 14nm CMOS with Package-Embedded Air-Core Inductor Featuring Self-Trimmed, Digitally Controlled Variable On-Time Discontinuous Conduction Mode OperationChristopher Schaef, Nachiket V. Desai, Harish Krishnamurthy, Sheldon Weng, Huong Do, William Lambert, Kaladhar Radhakrishnan, Krishnan Ravichandran, James Tschanz, Vivek De. 154-156 [doi]
- A Fully Integrated 85%-Peak-Efficiency Hybrid Multi Ratio Resonant DC-DC Converter with 3.0-to-4.5V Input and 500μA -to-120mA Load RangePeter Renz, Maik Kaufmann, Michael Lueders, Bernhard Wicht. 156-158 [doi]
- A 2MHz 4-to-60VIN Buck-Boost Converter for Automotive Use Achieving 95% Efficiency and CISPR 25 Class 5 StandardJing Xue, Minkyu Song, Xugang Ke, Min Chen, Leonard Shtargot. 158-160 [doi]
- Toward Automotive Surround-View RadarsChih-Ming Hung, Alex T. C. Lin, B. C. Peng, Hua Wang, Jui-Lin Hsu, Yen-Ju Lu, Wei-Show Hsu, Jing-Hong Conan Zhan, Brian Juan, Chi-Hang Lok, Sam Lee, P. C. Hsiao, Qiang Zhou, Mark Wei, Hsiang-Yun Chu, Yu-Lun Chen, Chao-Ching Hung, Kevin Fong, Po-Chun Huang, Pierce Chen, Sheng-Yuan Su, Yan-Jiun Chen, Kehou Chen, Chun-Chao Tung, Yi-Jhan Hsieh, Tzung-Chuen Tsai, Yi-Fu Chen, Wei-Kuo Hsin, Liang Guo, Hanfei Liu, Dapeng Jin. 162-164 [doi]
- A 192-Virtual-Receiver 77/79GHz GMSK Code-Domain MIMO Radar System-on-ChipVito Giannini, Marius Goldenberg, Aria Eshraghi, James Maligeorgos, Lysander Lim, Ryan Lobo, Dave Welland, Chung-Kai Chow, Andrew Dornbusch, Tim Dupuis, Struan Vaz, Fred Rush, Paul Bassett, Hong Kim, Monier Maher, Otto Schmid, Curtis Davis, Manju V. Hegde. 164-166 [doi]
- A680 μW Burst-Chirp UWB Radar Transceiver for Vital Signs and Occupancy Sensing up to 15m DistanceYao-Hong Liu, Sunil Sheelavant, Marco Mercuri, Paul Mateman, Johan Dijkhuis, Agossou Wilfried Zomagboguelou, Arjan Breeschoten, Stefano Traferro, Yan Zhang 0018, Tom Torfs, Christian Bachmann, Pieter Harpe, Masoud Babaie. 166-168 [doi]
- A 145GHz FMCW-Radar Transceiver in 28nm CMOSAkshay Visweswaran, Kristof Vaesen, Siddhartha Sinha, Ilja Ocket, Miguel Glassee, Claude Desset, André Bourdoux, Piet Wambacq. 168-170 [doi]
- An 80Gb/s 300GHz-Band Single-Chip CMOS TransceiverSangyeop Lee, Ruibing Dong, Takeshi Yoshida, Shuhei Amakawa, Shinsuke Hara, Akifumi Kasamatsu, Junji Sato, Minoru Fujishima. 170-172 [doi]
- A 42.2Gb/s 4.3pJ/b 60GHz Digital Transmitter with 12b/Symbol Polarization MIMOChintan Thakkar, Stefan Shopov, Anandaroop Chakrabarti, Shuhei Yamada, Debabani Choudhury, James E. Jaussi, Bryan Casper. 172-174 [doi]
- A Scalable 71-to-76GHz 64-Element Phased-Array Transceiver Module with 2×2 Direct-Conversion IC in 22nm FinFET CMOS TechnologyStefano Pellerano, Steven Callender, Woorim Shin, Yanjie Wang, Somnath Kundu, Abhishek Agrawal, Peter Sagazio, Brent R. Carlton, Farhana Sheikh, Arnaud Amadjikpe, William Lambert, Divya Shree Vemparala, Mark Chakravorti, Satoshi Suzuki, Robert Flory, Christopher D. Hull. 174-176 [doi]
- A 28GHz 20.3%-Transmitter-Efficiency 1.5°-Phase-Error Beamforming Front-End IC with Embedded Switches and Dual-Vector Variable-Gain Phase ShiftersJinseok Park, Seungchan Lee, Dong-Ho Lee, Songcheol Hong. 176-178 [doi]
- An Energy Measurement Front-End with Integrated In-Situ Background Full System Accuracy Monitoring Including the Current and Voltage SensorsSeyed Danesh, William Holland, Joe Spalding, Michael Guidry, J. E. D. Hurwitz. 180-182 [doi]
- A 22ng/√Hz 17mW MEMS Accelerometer with Digital Noise-Reduction TechniquesYuki Furubayashi, Takashi Oshima, Taizo Yamawaki, Keiki Watanabe, Keijiro Mori, Naoki Mori, Akira Matsumoto, Hideto Kazama, Yudai Kamada, Atsushi Isobe, Tomonori Sekiguchi. 182-184 [doi]
- 2 Wien-Bridge Temperature Sensor with 0.1°C (3σ) Inaccuracy from -40°C to 180°CSining Pan, Cagri Gurleyuk, Matheus F. Pimenta, Kofi A. A. Makinwa. 184-186 [doi]
- 2Sining Pan, Kofi A. A. Makinwa. 186-188 [doi]
- A 5.37mW/Channel Pitch-Matched Ultrasound ASIC with Dynamic-Bit-Shared SAR ADC and 13.2V Charge-Recycling TX in Standard CMOS for Intracardiac EchocardiographyJihee Lee, Kyoung-Rog Lee, Benjamin E. Eovino, Jeong Hoan Park, Liwei Lin, Hoi-Jun Yoo, Jerald Yoo. 190-192 [doi]
- A CMOS Biosensor Array with 1024 3-Electrode Voltammetry Pixels and 93dB Dynamic RangeArun Manickam, Kae-Dyi You, Nicholas Wood, Lei Pei, Yang Liu, Rituraj Singh, Nader Gamini, Davood Shahrjerdi, Robert G. Kuimelis, Arjang Hassibi. 192-194 [doi]
- A Capacitive Biosensor for Cancer Diagnosis Using a Functionalized Microneedle and a 13.7b-Resolution Capacitance-to-Digital Converter from 1 to 100nFSeung-Woo Song, Jukwan Na, Moon Hyung Jang, Hyeyeon Lee, HyeSoo Lee, Yongbeom Lim, Heonjin Choi, Youngcheol Chae. 194-196 [doi]
- A Fast-Readout Mismatch-Insensitive Magnetoresistive Biosensor Front-End Achieving Sub-ppm SensitivityXiahan Zhou, Michael Sveiven, Drew A. Hall. 196-198 [doi]
- A 512-Pixel 3kHz-Frame-Rate Dual-Shank Lensless Filterless Single-Photon-Avalanche-Diode CMOS Neural Imaging ProbeChanghyuk Lee, Adriaan J. Taal, Jaebin Choi, Kukjoo Kim, Kevin Tien, Laurent Moreaux, Michael L. Roukes, Kenneth L. Shepard. 198-200 [doi]
- An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor-Node Applications in 40nm CMOS/MTJ-Hybrid Technology Achieving 47.14μW Operation at 200MHzMasanori Natsui, Daisuke Suzuki, Akira Tamakoshi, Toshinari Watanabe, Hiroaki Honjo, Hiroki Koike, Takashi Nasuno, Yitao Ma, Takaho Tanigawa, Yasuo Noguchi, Mitsuo Yasuhira, Hideo Sato, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu. 202-204 [doi]
- Micro Short-Circuit Detector Including S/H Circuit for 1hr Retention and 52dB Comparator Composed of C-Axis Aligned Crystalline IGZO FETs for Li-Ion Battery Protection ICHiroki Inoue, Takeshi Aoki, Fumika Akasawa, Toshiki Hamada, Toshihiko Takeuchi, Kousei Nei, Takako Seki, Yuto Yakubo, Kei Takahashi, Shuji Fukai, Takahiko Ishizu, Munehiro Kozuma, Ryota Tajima, Takanori Matsuzaki, Takayuki Ikeda, Makoto Ikeda, Shunpei Yamazaki. 204-206 [doi]
- Memory Solutions for Flexible Thin-Film Logic: up to 8kb, >105.9kb/s LPROM and SRAM with Integrated Timing Generation Meeting the ISO NFC StandardFlorian De Roose, Jan Genoe, Auke Jisk Kronemeijer, Kris Myny, Wim Dehaene. 206-208 [doi]
- A 1.33Tb 4-bit/Cell 3D-Flash Memory on a 96-Word-Line-Layer TechnologyNoboru Shibata, Kazushige Kanda, T. Shimizu, J. Nakai, Osamu Nagao, N. Kobayashi, M. Miakashi, Yasushi Nagadomi, Takeshi Nakano, T. Kawabe, T. Shibuya, Mario Sako, Kosuke Yanagidaira, Toshifumi Hashimoto, H. Date, Manabu Sato, T. Nakagawa, H. Takamoto, Junji Musha, Takatoshi Minamoto, M. Uda, Dai Nakamura, K. Sakurai, T. Yamashita, J. Zhou, R. Tachibana, Teruo Takagiwa, Takahiro Sugimoto, Mikio Ogawa, Yusuke Ochi, K. Kawaguchi, Masatsugu Kojima, T. Ogawa, Tomoharu Hashiguchi, Ryo Fukuda, M. Masuda, K. Kawakami, T. Someya, Yasuyuki Kajitani, Yuuki Matsumoto, Naohito Morozumi, Jumpei Sato, Namas Raghunathan, Y. L. Koh, S. Chen, J. Lee, Hiroaki Nasu, Hiroshi Sugawara, Koji Hosono, Toshiki Hisada, T. Kaneko, H. Nakamura. 210-212 [doi]
- 2 Embedded Non-Volatile ReRAM Macro in 22nm FinFET Technology with Adaptive Forming/Set/Reset Schemes Yielding Down to 0.5V with Sensing Time of 5ns at 0.7VPulkit Jain, Umut Arslan, Meenakshi Sekhar, Blake C. Lin, Liqiong Wei, Tanaya Sahu, Juan Alzate-vinasco, Ajay Vangapaty, Mesut Meterelliyoz, Nathan Strutt, Albert B. Chen, Patrick Hentges, Pedro A. Quintero, Chris Connor, Oleg Golonzka, Kevin Fischer, Fatih Hamzaoglu. 212-214 [doi]
- A 7Mb STT-MRAM in 22FFL FinFET Technology with 4ns Read Sensing Time at 0.9V Using Write-Verify-Write Scheme and Offset-Cancellation Sensing TechniqueLiqiong Wei, Juan G. Alzate, Umut Arslan, Justin Brockman, Nilanjan Das, Kevin Fischer, Tahir Ghani, Oleg Golonzka, Patrick Hentges, Rawshan Jahan, Pulkit Jain, Blake C. Lin, Mesut Meterelliyoz, Jim OrDonnell, Conor Puls, Pedro A. Quintero, Tanaya Sahu, Meenakshi Sekhar, Ajay Vangapaty, Chris Wiegand, Fatih Hamzaoglu. 214-216 [doi]
- th-Generation V-NAND Flash Memory with 82MB/s Write Throughput and 1.2Gb/s InterfaceDongku Kang, Minsu Kim, Suchang Jeon, Wontaeck Jung, Jooyong Park, Gyo Soo Choo, Dong-Kyo Shim, Anil Kavala, SeungBum Kim, Kyung-Min Kang, Jiyoung Lee, Kuihan Ko, Hyun Wook Park, ByungJun Min, Changyeon Yu, Sewon Yun, Nahyun Kim, Yeonwook Jung, Sungwhan Seo, Sunghoon Kim, Moo Kyung Lee, Joo-Yong Park, James C. Kim, Young San Cha, Kwangwon Kim, Youngmin Jo, Hyun-Jin Kim, Youngdon Choi, Jindo Byun, Ji-hyun Park, KiWon Kim, Tae-Hong Kwon, Young-Sun Min, Chiweon Yoon, Youngcho Kim, Dong-Hun Kwak, Eungsuk Lee, Wook-Ghee Hahn, Ki-Sung Kim, Kyungmin Kim, Euisang Yoon, Wontae Kim, Inryul Lee, SeungHyun Moon, Jeong-Don Ihm, Dae-Seok Byeon, Ki-Whan Song, Sangjoon Hwang, Kyehyun Kyung. 216-218 [doi]
- A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array TechnologyChang Hua Siau, Kwang Ho Kim, Seungpil Lee, Katsuaki Isobe, Noboru Shibata, Kapil Verma, Takuya Ariki, Jason Li 0001, Jong Yuh, Anirudh Amarnath, Qui Nguyen, Ohwon Kwon, Stanley Jeong, Heguang Li, Hua-Ling Hsu, Taiyuan Tseng, Steve Choi, Siddhesh Darne, Pradeep Anantula, Alex Yap, Hardwell Chibvongodze, Hitoshi Miwa, Minoru Yamashita, Mitsuyuki Watanabe, Koichiro Hayashi, Yosuke Kato, Toru Miwa, Jang Yong Kang, Masatoshi Okumura, Naoki Ookuma, Muralikrishna Balaga, Venky Ramachandra, Aki Matsuda, Swaroop Kulkarni, Raghavendra Rachineni, Pai K. Manjunath, Masahito Takehara, Anil Pai, Srinivas Rajendra, Toshiki Hisada, Ryo Fukuda, Naoya Tokiwa, Kazuaki Kawaguchi, Masashi Yamaoka, Hiromitsu Komai, Takatoshi Minamoto, Masaki Unno, Susumu Ozawa, Hiroshi Nakamura, Tomoo Hishida, Yasuyuki Kajitani, Lei Lin. 218-220 [doi]
- A 65nm 1.1-to-9.1TOPS/W Hybrid-Digital-Mixed-Signal Computing Platform for Accelerating Model-Based and Model-Free Swarm RoboticsNingyuan Cao, Muya Chang, Arijit Raychowdhury. 222-224 [doi]
- A Compute SRAM with Bit-Serial Integer/Floating-Point Operations for Programmable In-Memory Vector AccelerationJingcheng Wang, Xiaowei Wang, Charles Eckert, Arun Subramaniyan 0001, Reetuparna Das, David T. Blaauw, Dennis Sylvester. 224-226 [doi]
- A 43pJ/Cycle Non-Volatile Microcontroller with 4.7μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience TechniquesTony F. Wu, Binh Q. Le, Robert Radway, Andrew Bartolo, William Hwang, Seungbin Jeong, Haitong Li, Pulkit Tandon, Elisa Vianello, Pascal Vivet, Etienne Nowak, Mary Wootters, H.-S. Philip Wong, Mohamed M. Sabry Aly, Edith Beigné, Subhasish Mitra. 226-228 [doi]
- All-Digital Time-Domain CNN Engine Using Bidirectional Memory Delay Lines for Energy-Efficient Edge ComputingAseem Sayal, Shirin Fathima, S. S. Teja Nibhanupudi, Jaydeep P. Kulkarni. 228-230 [doi]
- A 0.6-to-1.1V Computationally Regulated Digital LDO with 2.79-Cycle Mean Settling Time and Autonomous Runtime Gain Tracking in 65nm CMOSXun Sun, Akshat Boora, Wenbing Zhang, Venkata Rajesh Pamula, Visvesh S. Sathe. 230-232 [doi]
- 5 Dynamic Load Range, 99.99% Current Efficiency, and 2mV Output Voltage RippleShuo Li, Benton H. Calhoun. 232-234 [doi]
- A Modular Hybrid LDO with Fast Load-Transient Response and Programmable PSRR in 14nm CMOS Featuring Dynamic Clamp Tuning and Time-Constant CompensationXiaosen Liu, Harish K. Krishnamurthy, Taesik Na, Sheldon Weng, Khondker Z. Ahmed, Krishnan Ravichandran, James Tschanz, Vivek De. 234-236 [doi]
- An 88%-Efficiency Supply Modulator Achieving 1.08μs/V Fast Transition and 100MHz Envelope-Tracking Bandwidth for 5G New Radio RF Power AmplifierJi-Seon Paek, Dong-Su Kim, Jun-Suk Bang, Jongbeom Baek, Jeong-Hyun Choi, Takahiro Nomiyama, Jae-Yeol Han, Young-Hwan Choo, Yong-Sik Youn, Euiyoung Park, Sung-Jun Lee, Ik-Hwan Kim, Jongwoo Lee, Thomas Byunghak Cho, Inyup Kang. 238-240 [doi]
- A 90ns/V Fast-Transition Symbol-Power-Tracking Buck Converter for 5G mm-Wave Phased-Array TransceiverJi-Seon Paek, Takahiro Nomiyama, Jae-Yeol Han, Ik-Hwan Kim, Yumi Lee, Dongsu Kim, Euiyoung Park, Sung-Jun Lee, Jongwoo Lee, Thomas Byunghak Cho, Inyup Kang. 240-242 [doi]
- A 100W and 91% GaN-Based Class-E Wireless-Power-Transfer Transmitter with Differential-Impedance-Matching Control for Charging Multiple DevicesCheng-Yu Xie, Shang-Hsien Yang, Shen-Fu Lu, Fa-Yi Lin, Yen-An Lin, You-Zheng Ou-Yang, Ke-Horng Chen, Kuo-Chi Liu, Ying-Hsi Lin. 242-244 [doi]
- A 52% Peak-Efficiency >1W Isolated Power Transfer System Using Fully Integrated Magnetic-Core TransformerYue Zhuo, Shaoyu Ma, Tianting Zhao, Wenhui Qin, Yuanyuan Zhao, Yingjie Guo, Baoxing Chen. 244-246 [doi]
- An 800mW Fully Integrated Galvanic Isolated Power Transfer System Meeting CISPR 22 Class-B Emission Levels with 6dB MarginWenhui Qin, Xin Yang, Shaoyu Ma, Fang Liu, Yuanyuan Zhao, Tianting Zhao, Baoxing Chen. 246-248 [doi]
- A 10MHz i-Collapse Failure Self-Prognostic GaN Power Converter with TJ-Independent In-Situ Condition Monitoring and Proactive Temperature Frequency ScalingYingping Chen, Dongsheng Brian Ma. 248-250 [doi]
- An 8.3MHz GaN Power Converter Using Markov Continuous RSSM for 35dBμV Conducted EMI Attenuation and One-Cycle TON Rebalancing for 27.6dB VO Jittering SuppressionYingping Chen, Dongsheng Brian Ma. 250-252 [doi]
- A 4.5V/ns Active Slew-Rate-Controlling Gate Driver with Robust Discrete-Time Feedback Technique for 600V Superjunction MOSFETsShusuke Kawai, Takeshi Ueno, Kohei Onizuka. 252-254 [doi]
- A 265μW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOSHanli Liu, Zheng Sun, Hongye Huang, Wei Deng, Teerachot Siriburanon, Jian Pang, Yun Wang, Rui Wu, Teruki Someya, Atsushi Shirane, Kenichi Okada. 256-258 [doi]
- A 76fsrms Jitter and -40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain OptimizationJuyeop Kim, Heein Yoon, Younghyun Lim, Yongsun Lee, Yoonseo Cho, Taeho Seong, Jaehyouk Choi. 258-260 [doi]
- A -246dB Jitter-FoM 2.4GHz Calibration-Free Ring-Oscillator PLL Achieving 9% Jitter Variation Over PVTXiaofeng Yang 0004, Chi-Hang Chan, Yan Zhu 0001, Rui P. Martins. 260-262 [doi]
- A 0.5-to-2.5GHz Multi-Output Fractional Frequency Synthesizer with 90fs Jitter and -106dBc Spurious Tones Based on Digital Spur CancellationSzu-Yao Hung, Sudhakar Pamarti. 262-264 [doi]
- A Fractional-N Synthesizer with 110fsrms Jitter and a Reference Quadrupler for Wideband 802.11axFei Song, Yu Zhao, Bart Wu, Litian Tang, Leon Lin, Behzad Razavi. 264-266 [doi]
- A Calibration-Free Triple-Loop Bang-Bang PLL Achieving 131fsrms Jitter and-70dBc Fractional SpursDihang Yang, Asad A. Abidi, Hooman Darabi, Hao Xu, David Murphy, Hao Wu 0005, Zhaowen Wang. 266-268 [doi]
- A 30GHz Digital Sub-Sampling Fractional-N PLL with 198fsrms Jitter in 65nm LP CMOSLuigi Grimaldi, Luca Bertulessi, Saleh Karman, Dmytro Cherniak, Alessandro Garghetti, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino. 268-270 [doi]
- A 25.4-to-29.5GHz 10.2mW Isolated Sub-Sampling PLL Achieving -252.9dB Jitter-Power FoM and -63dBc Reference SpurZunsong Yang, Yong Chen 0005, Shiheng Yang, Pui-In Mak, Rui P. Martins. 270-272 [doi]
- 4.48GHz 0.18μm SiGe BiCMOS Exact-Frequency Fractional-N Frequency Synthesizer with Spurious-Tone Suppression Yielding a -80dBc In-Band Fractional SpurMichael Peter Kennedy, Yann Donnelly, James Breslin, Stefano Tulisi, Sanganagouda Patil, Ciaran Curtin, Stephen Brookes, Brian Shelly, Patrick Griffin, Michael Keaveney. 272-274 [doi]
- AI x Robotics: Technology Challenges and Opportunities in Sensors, Actuators, and Integrated CircuitsMasahiro Fujita. 276-278 [doi]
- A 142nW Voice and Acoustic Activity Detection Chip for mm-Scale Sensor Nodes Using Time-Interleaved Mixer-Based Frequency ScanningMinchang Cho, Sechang Oh, Zhan Shi, Jongyup Lim, Yejoong Kim, Seokhyeon Jeong, Yu Chen, David T. Blaauw, Hun-Seok Kim, Dennis Sylvester. 278-280 [doi]
- Hybrid System for Efficient LAE-CMOS Interfacing in Large-Scale Tactile-Sensing Skins via TFT-Based Compressed SensingLevent E. Aygun, Prakhar Kumar, Zhiwu Zheng, Ting-Sheng Chen, Sigurd Wagner, James C. Sturm, Naveen Verma. 280-282 [doi]
- 16MHz FRAM Micro-Controller with a Low-Cost Sub-1μA Embedded Piezo-Electric Strain Sensor for ULP Motion DetectionSudhanshu Khanna, Michael Zwerg, Brian Elies, Juergen Luebbe, Nagaraj Krishnasawamy, Hadi Najar, Suman Bellary, Wei-Yan Shih, Scott R. Summerfelt, Steven Bartling. 282-284 [doi]
- 3 Ultrasonic Implantable Wireless Neural Recording System With Linear AM BackscatteringMohammad Meraj Ghanbari, David K. Piech, Konlin Shen, Sina Faraji Alamouti, Cem Yalcin, Benjamin C. Johnson, Jose M. Carmena, Michel M. Maharbiz, Rikky Muller. 284-286 [doi]
- A Sub-40μW 5Mb/s Magnetic Human Body Communication Transceiver Demonstrating Trans-Body Delivery of High-Fidelity Audio to a Wearable In-Ear HeadphoneJiwoong Park, Patrick P. Mercier. 286-287 [doi]
- A 7.0fps Optical and Electrical Dual Tomographic Imaging SoC for Skin-Disease Diagnosis SystemYongsu Lee, Kwantae Kim, Jiwon Lee, Kyoung-Rog Lee, Surin Gweon, Minseo Kim, Hoi-Jun Yoo. 288-289 [doi]
- A 2.6μW Monolithic CMOS Photoplethysmographic Sensor Operating with 2μW LED PowerAntonino Caizzone, Assim Boukhayma, Christian Enz. 290-291 [doi]
- A -105dBc THD+N (-114dBc HD2) at 2.8VPP Swing and 120dB DR Audio Decoder with Sample-and-Hold Noise Filtering and Poly Resistor Linearization SchemesShon-Hang Wen, Kuan-Dar Chen, Chuan-Hung Hsiao, Ya-Chi Chen. 294-295 [doi]
- A 16fJ/Conversion-Step Time-Domain Two-Step Capacitance-to-Digital ConverterXiyuan Tang, Shaolan Li, Linxiao Shen, Wenda Zhao, Xiangxing Yang, Randy Williams, Jiaxin Liu, Zhichao Tan, Neal Hall, Nan Sun. 296-297 [doi]
- An Auto-Zero Stabilized Voltage Buffer with a Quiet Chopping Scheme and Constant Input CurrentThije Rooijers, Johan H. Huijsing, Kofi A. A. Makinwa. 298-299 [doi]
- A 0.55nW/0.5V 32kHz Crystal Oscillator Based on a DC-Only Sustaining Amplifier for IoTHani Esmaeelzadeh, Sudhakar Pamarti. 300-301 [doi]
- A 54MHz Crystal Oscillator With 30× 18.5 Start-Up Time Reduction Using 2-Step Injection in 65nm CMOSKarim M. Megawer, Nilanjan Pal, Ahmed Elkholy, Mostafa Gamal Ahmed, Amr Khashaba, Danielle Griffith, Pavan Kumar Hanumolu. 302-304 [doi]
- A 32MHz Crystal Oscillator with Fast Start-up Using Synchronized Signal InjectionBram Verhoef, Jan Prummel, Wim Kruiskamp, Rein Post. 304-305 [doi]
- A 0.7V, 2.35% 3σ-Accuracy Bandgap Reference in 12nm CMOSYi-Wen Chen, Jaw-Juinn Horng, Chin-Ho Chang, Amit Kundu, Yung-Chow Peng, Mark Chen. 306-307 [doi]
- A 192pW Hybrid Bandgap-Vth Reference with Process Dependence Compensated by a Dimension-Induced Side-EffectYoungwoo Ji, Jungho Lee, Byungsub Kim, Hong June Park, Jae-Yoon Sim. 308-310 [doi]
- Computationally Enabled Total Energy Minimization Under Performance Requirements for a Voltage-Regulated 0.38-to-0.58V Microprocessor in 65nm CMOSFahim ur Rahman, Rajesh Venkata Pamula, Akshat Boora, Xun Sun, Visvesh S. Sathe. 312-314 [doi]
- A 6.4pJ/Cycle Self-Tuning Cortex-M0 IoT Processor Based on Leakage-Ratio Measurement for Energy-Optimal Operation Across Wide-Range PVT VariationJeongsup Lee, Yiqun Zhang 0002, Qing Dong 0001, Wootaek Lim, Mehdi Saligane, Yejoong Kim, Seokhyeon Jeong, Jongyup Lim, Makoto Yasuda, Satoru Miyoshi, Masaru Kawaminami, David T. Blaauw, Dennis Sylvester. 314-315 [doi]
- A 7nm All-Digital Unified Voltage and Frequency Regulator Based on a High-Bandwidth 2-Phase Buck Converter with Package InductorsFrancois Atallah, Keith A. Bowman, Hoan Nguyen, Jihoon Jeong, Daniel Yingling, Yu Sun, Brad Appel, Anthony Polomik, Mahesh Harinath, Joshua Morelli, Thomas Moore, Nathaniel Reeves, Amer Cassier, Arijit Raychowdhury. 316-318 [doi]
- An Adaptive Clock Management Scheme Exploiting Instruction-Based Dynamic Timing Slack for a General-Purpose Graphics Processor Unit with Deep Pipeline and Out-of-Order ExecutionTianyu Jia, Russ Joseph, Jie Gu. 318-320 [doi]
- Digital Leakage Compensation for a Low-Power and Low-Jitter 0.5-to-5GHz PLL in 10nm FinFET CMOS TechnologyYongping Fan, Bo Xiang, Dan Zhang, James S. Ayers, Kuan-Yueh James Shen, Andrey Mezhiba. 320-322 [doi]
- A 40-to-80MHz Sub-4μW/MHz ULV Cortex-M0 MCU SoC in 28nm FDSOI With Dual-Loop Adaptive Back-Bias Generator for 20μs Wake-Up From Deep Fully Retentive Sleep ModeDavid Bol, Maxime Schramme, Ludovic Moreau, Thomas Haine, Pengcheng Xu, Charlotte Frenkel, Remi Dekimpe, François Stas, Denis Flandre. 322-324 [doi]
- A Scalable Pipelined Time-Domain DTW Engine for Time-Series Classification Using Multibit Time Flip-Flops With 140Giga-Cell-Updates/s ThroughputZhengyu Chen, Jie Gu. 324-326 [doi]
- A 5GS/s 7.2 ENOB Time-Interleaved VCO-Based ADC Achieving 30.5fJ/conv-stepMaarten Baert, Wim Dehaene. 328-330 [doi]
- A 40MHz-BW 320MS/s Passive Noise-Shaping SAR ADC With Passive Signal-Residue Summation in 14nm FinFETYing-Zu Lin, Chin-Yu Lin, Shan-Chih Tsou, Chih-Hou Tsai, Chao-Hsin Lu. 330-332 [doi]
- th-Order Noise-Shaping SAR ADCLu Jie, Boyi Zheng, Michael P. Flynn. 332-334 [doi]
- An 8 × - OSR 25MHz-BW 79.4dB/74dB DR/SNDR CT Δ σ Modulator Using 7b Linearized Segmented DACs with Digital Noise-Coupling-Compensation Filter in 7nm FinFET CMOSTien-Yu Lo, Chan-Hsiang Weng, Hung-Yi Hsieh, Yun-Shiang Shu, Pao-Cheng Chiu. 334-336 [doi]
- A 76.6dB-SNDR 50MHz-BW 29.2mW Noise-Coupling-Assisted CT Sturdy MASH ΔΣ Modulator with 1.5b/4b Quantizers in 28nm CMOSLiang Qi, Ankesh Jain, Dongyang Jiang, Sai-Weng Sin, Rui P. Martins, Maurits Ortmanns. 336-338 [doi]
- An 80MHz-BW 31.9fJ/conv-step Filtering ΔΣ ADC with a Built-In DAC-Segmentation/ELD-Compensation 6b 960MS/s SAR-Quantizer in 28nm LP for 802.11ax ApplicationsChi-Yun Wang, Jen-Huan Tsai, Sheng-Yuan Su, Jen-Che Tsai, Jhy-Rong Chen, Chih-Hong Lou. 338-340 [doi]
- A 72.6dB-SNDR 100MHz-BW 16.36mW CTDSM with Preliminary Sampling and Quantization Scheme in Backend Subranging QTZWei Wang, Chi-Hang Chan, Yan Zhu 0001, Rui P. Martins. 340-342 [doi]
- A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NRJian Pang, Zheng Li, Ryo Kubozoe, Xueting Luo, Rui Wu, Yun Wang, Dongwon You, Ashbir Aviat Fadila, Rattanan Saengchan, Takeshi Nakamura, Joshua Alvin, Daiki Matsumoto, Aravind Tharayil Narayanan, Bangan Liu, Junjun Qiu, Hanli Liu, Zheng Sun, Hongye Huang, Korkut Kaan Tokgoz, Keiichi Motoi, Naoki Oshima, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada. 344-346 [doi]
- A 27-to-41GHz MIMO Receiver with N-Input-N-Output Using Scalable Cascadable Autonomous Array-Based High-Order Spatial Filters for Instinctual Full-FoV Multi-Blocker/Signal ManagementMin-Yu Huang, Hua Wang. 346-348 [doi]
- A Reconfigurable Bidirectional 28/37/39GHz Front-End Supporting MIMO-TDD, Carrier Aggregation TDD and FDD/Full-Duplex with Self-Interference Cancellation in Digital and Fully Connected Hybrid BeamformersSusnata Mondal, Rahul Singh, Jeyanandh Paramesh. 348-350 [doi]
- An LTE-A Multimode Multiband RF Transceiver with 4RX/2TX Inter-Band Carrier Aggregation, 2-Carrier 4×4 MIMO with 256QAM and HPUE Capability in 28nm CMOSChih-Chun Tang, Yi-Bin Lee, Chih-hao Eric Sun, Cheng-Chieh Lin, Jin-Siang Syu, Min-Hua Wu, YangChuan Chen, Tzu-Chan Chueh, Carl Bryant, Manel Collados, Mohammed Hassan, Joao Ramos, Yu-Lin Hsieh, Hsinhung Chen, Xiaochuan Guo, Hsinhua Chen, Changhua Cao, Daniel Li, Jon Strange, Caiyi Wang, Guang-Kaai Dehng. 350-352 [doi]
- A 5G Sub-6GHz Zero-IF and mm-Wave IF Transceiver with MIMO and Carrier AggregationBenjamin Jann, Greg Chance, Ankur Guha Roy, Aishwarya Balakrishnan, Niranjan Karandikar, Thomas William Brown, Xi Li, Brandon Davis, Jose Luis Ceballos, Nebil Tanzi, Kurt Hausmann, Hyun Yoon, Yen-ling Huang, Amit Freiman, Bruce Geren, Peter Pawliuk, Wayne Ballantyne. 352-354 [doi]
- A Sub-6GHz 5G New Radio RF Transceiver Supporting EN-DC with 3.15Gb/s DL and 1.27Gb/s UL in 14nm FinFET CMOSJongwoo Lee, Sangwook Han, Joonhee Lee, Byoungjoong Kang, Jeongyeol Bae, Jaehyuk Jang, Seunghyun Oh, Su-Seob Ahn, Sanghoon Kang, Quang-Diep Bui, Kiyong Son, Hyungsun Lim, Daechul Jeong, Ronghua Ni, Yongrong Zuo, Ilyong Jong, Chih-Wei Yao, Seungchan Heo, Thomas Byunghak Cho, Inyup Kang. 354-356 [doi]
- A Mixed-Signal Circuit Technique for Cancellation of Multiple Modulated Spurs in 4G/5G Carrier-Aggregation TransceiversSilvester Sadjina, Krzysztof Dufrene, Ram Sunil Kanumalli, Mario Huemer, Harald Pretl. 356-358 [doi]
- A 769μW Battery-Powered Single-Chip SoC With BLE for Multi-Modal Vital Sign Health PatchesMario Konijnenburg, Roland Van Wegberg, Shuang Song, Hyunsoo Ha, Wim Sijbers, Jiawei Xu, Stefano Stanzione, Chris van Liempd, Dwaipayan Biswas, Arjan Breeschoten, Peter Vis, Chris Van Hoof, Nick Van Helleputte. 360-362 [doi]
- A Rugged Wearable Modular ExG Platform Employing a Distributed Scalable Multi-Channel FM-ADC Achieving 101dB Input Dynamic Range and Motion-Artifact ResilienceJulian Warchall, Paul T. Theilmann, Yuxuan Ouyang, Harinath Garudadri, Patrick P. Mercier. 362-364 [doi]
- A 0.5V 9.26μW 15.28mΩ/√Hz Bio-Impedance Sensor IC With 0.55° Overall Phase ErrorKwantae Kim, Ji-Hoon Kim, Surin Gweon, Jiwon Lee, Minseo Kim, Yongsu Lee, Soyeon Kim, Hoi-Jun Yoo. 364-366 [doi]
- A 27.8μW Biopotential Amplifier Tolerant to 30Vpp Common-Mode Interference for Two-Electrode ECG Recording in 0.18μm CMOSNahmil Koo, SeongHwan Cho. 366-368 [doi]
- A Bio-Impedance Readout IC With Digital-Assisted Baseline Cancellation for 2-Electrode MeasurementHyunsoo Ha, Wim Sijbers, Roland Van Wegberg, Jiawei Xu, Mario Konijnenburg, Peter Vis, Arjan Breeschoten, Shuang Song, Chris Van Hoof, Nick Van Helleputte. 368-370 [doi]
- 2 Electrical Impedance Tomography SoC Based on Frequency Division Multiplexing with 10× Throughput ReductionBoxiao Liu, Guoxing Wang, Yongfu Li, Hui Li, Yue Gao, Lei Zeng, Yixin Ma, Yong Lian, Chun-Huat Heng. 370-372 [doi]
- A Programmable Wireless EEG Monitoring SoC with Open/Closed-Loop Optogenetic and Electrical Stimulation for Epilepsy ControlShuenn-Yuh Lee, Chieh Tsou, Peng-Wei Huang, Po-Hao Cheng, Chi-Chung Liao, Zhan-Xien Liao, Hao-Yun Lee, Chou-Ching Lin, Chia-Hsiang Hsieh. 372-374 [doi]
- Adaptively Clock-Boosted Auto-Ranging Responsive Neurostimulator for Emerging Neuromodulation ApplicationsReza Pazhouhandeh, Gerard O'Leary, Iliya Weisspapir, David M. Groppe, Xuan-Thuan Nguyen, Karim Abdelhalim, Hamed Mazhab-Jafari, Taufik A. Valiante, Peter L. Carlen, Naveen Verma, Roman Genov. 374-376 [doi]
- A 7.5Gb/s/pin LPDDR5 SDRAM With WCK Clocking and Non-Target ODT for High Speed and With DVFS, Internal Data Copy, and Deep-Sleep Mode for Low PowerKyung-Soo Ha, Chang-Kyo Lee, Dongkeon Lee, Daesik Moon, Jin-Hun Jang, Hyong-Ryol Hwang, Hyung-Joon Chi, Junghwan Park, Seungjun Shin, Dukha Park, Sang Yun Kim, Sukhyun Lim, Kiwon Park, YeonKyu Choi, Young-Hwa Kim, Younghoon Son, Hyunyoon Cho, Byongwook Na, Hyo-Joo Ahn, SeungSeob Lee, Seouk-Kyu Choi, Youn-Sik Park, Seok-Hun Hyun, Soobong Chang, Hyuck-Joon Kwon, Jung Hwan Choi, Tae-young Oh, Young-Soo Sohn, Kwang-Il Park, Seong-Jin Jang. 378-380 [doi]
- A 1.1V 1ynm 6.4Gb/s/pin 16Gb DDR5 SDRAM with a Phase-Rotator-Based DLL, High-Speed SerDes and RX/TX Equalization SchemeDongkyun Kim, Minsu Park, Sungchun Jang, Jun-Yong Song, Hankyu Chi, Geunho Choi, Sunmyung Choi, Jaeil Kim, Changhyun Kim, Kyung-whan Kim, Kibong Koo, Seonghwi Song, Yongmi Kim, Dong Uk Lee, Jaejin Lee, Dae Suk Kim, Ki Hun Kwon, Minsik Han, Byeongchan Choi, Hongjung Kim, Sanghyun Ku, Yeonuk Kim, Jong-Sam Kim, Sanghui Kim, Youngsuk Seo, Seungwook Oh, Dain Im, Haksong Kim, Jonghyuck Choi, Jinil Chung, Changhyun Lee, Yongsung Lee, Joo-Hwan Cho, Junhyun Chun, Jonghoon Oh. 380-382 [doi]
- A 3-bit/2UI 27Gb/s PAM-3 Single-Ended Transceiver Using One-Tap DFE for Next-Generation Memory InterfaceHyunsu Park, Junyoung Song, Yeonho Lee, Jincheol Sim, Jonghyuck Choi, Chulwoo Kim. 382-384 [doi]
- A 512GB 1.1V Managed DRAM Solution with 16GB ODP and Media ControllerSeong Ju Lee, Byung Deuk Jeon, Kyeong Pil Kang, Dong Yoon Ka, Na Yeon Kim, Yongseop Kim, Yunseok Hong, Mankeun Kang, Jinyong Min, Mingyu Lee, Chunseok Jeong, Kwandong Kim, Doobock Lee, Junghyun Shin, Yuntack Han, Youngbo Shim, Youngjoo Kim, Yongsun Kim, Hyunseok Kim, Jaewoong Yun, Byungsoo Kim, Seokhwan Han, Changwoo Lee, Junyong Song, Ho Uk Song, II Park, Yongju Kim, Junhyun Chun, Jonghoon Oh. 384-386 [doi]
- A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge ProcessorsCheng-Xin Xue, Wei-Hao Chen, Je-Syu Liu, Jia-Fang Li, Wei-Yu Lin, Wei-En Lin, Jing-Hong Wang, Wei-Chen Wei, Ting-Wei Chang, Tung-Cheng Chang, Tsung-Yuan Huang, Hui-Yao Kao, Shih-Ying Wei, Yen-Cheng Chiu, Chun-Ying Lee, Chung-Chuan Lo, Ya-Chin King, Chorng-Jung Lin, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang. 388-390 [doi]
- A 7nm 2.1GHz Dual-Port SRAM with WL-RC Optimization and Dummy-Read-Recovery Circuitry to Mitigate Read- Disturb-Write IssueHidehiro Fujiwara, Chih-Yu Lin, Hsien-Yu Pan, Cheng-Han Lin, Po-Yi Huang, Kao-Cheng Lin, Jhon-Jhy Liaw, Yen-Huei Chen, Hung-Jen Liao, Jonathan Chang. 390-392 [doi]
- A Voltage and Temperature Tracking SRAM Assist Supporting 740mV Dual-Rail Offset for Low-Power and High-Performance Applications in 7nm EUV FinFET TechnologyInhak Lee, Hanwool Jeong, Sangyeop Baeck, Siddharth Gupta, Changnam Park, Dongwook Seo, Jaeseung Choi, Jaeyoung Kim, Hoon Kim, Jungmyung Kang, Sunyung Jang, Daeyoung Moon, Sangshin Han, Taehyung Kim, Jaehyun Lim, Younghwan Park, Hyejin Hwang, Jeonseung Kang, Jaeseung Choi, Taejoong Song. 392-394 [doi]
- Sandwich-RAM: An Energy-Efficient In-Memory BWN Architecture with Pulse-Width ModulationJun Yang, Yuyao Kong, Zhen Wang, Yan Liu, Bo Wang, Shouyi Yin, Longxin Shi. 394-396 [doi]
- A Twin-8T SRAM Computation-In-Memory Macro for Multiple-Bit CNN-Based Machine LearningXin Si, Jia-Jing Chen, Yung-Ning Tu, Wei-Hsing Huang, Jing-Hong Wang, Yen-Cheng Chiu, Wei-Chen Wei, Ssu-Yen Wu, Xiaoyu Sun, Rui Liu 0005, Shimeng Yu, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Qiang Li, Meng-Fan Chang. 396-398 [doi]
- 2 Physically Unclonable Function with a Zero-Overhead Stabilization SchemeDai Li, Kaiyuan Yang. 400-402 [doi]
- A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source With -6 Native Bit Error RateYachun Pang, Bin Gao, Dong Wu, Shengyu Yi, Qi Liu, Wei-Hao Chen, Ting-Wei Chang, Wei-En Lin, Xiaoyu Sun, Shimeng Yu, He Qian, Meng-Fan Chang, Huaqiang Wu. 402-404 [doi]
- A 128b AES Engine with Higher Resistance to Power and Electromagnetic Side-Channel Attacks Enabled by a Security-Aware Integrated All-Digital Low-Dropout RegulatorArvind Singh, Monodeep Kar, Sanu Mathew, Anand Rajan, Vivek De, Saibal Mukhopadhyay. 404-406 [doi]
- A Self-Calibrated 16GHz Subsampling-PLL-Based 30s Fast Chirp FMCW Modulator with 1.5GHz Bandwidth and 100kHz rms ErrorQixian Shi, Keigo Bunsen, Nereo Markulic, Jan Craninckx. 408-410 [doi]
- A 0.08mm2 25.5-to-29.9GHz Multi-Resonant-RLCM-Tank VCO Using a Single-Turn Multi-Tap Inductor and CM-Only Capacitors Achieving 191.6dBc/Hz FoM and 130kHz 1/f3 PN CornerHao Guo, Yong Chen 0005, Pui-In Mak, Rui P. Martins. 410-412 [doi]
- A 25-to-38GHz, 195dB FoMT LC QVCO in 65nm LP CMOS Using a 4-Port Dual-Mode Resonator for 5G RadiosAbhishek Bhat, Nagendra Krishnapura. 412-414 [doi]
- A 2.4GHz 65nm CMOS Mixer-First Receiver Using 4-Stage Cascaded Inverter-Based Envelope-Biased LNAs Achieving 66dB In-Band Interference Tolerance and -83dBm SensitivityDawei Ye, Rongjin Xu, C.-J. Richard Shi. 414-416 [doi]
- A 0.1-to-0.2V Transformer-Based Switched-Mode Folded DCO in 22nm FDSOI With Active Step-Down Impedance Achieving 197dBc/Hz Peak FoM and 40MHz/V Frequency PushingOmar El-Aassar, Gabriel M. Rebeiz. 416-418 [doi]
- An 84% Peak Efficiency Bipolar-Input Boost/Flyback Hybrid Converter With MPPT and on-Chip Cold Starter for Thermoelectric Energy HarvestingPeng Cao, Yao Qian, Pan Xue, Danzhu Lu, Jie He, Zhiliang Hong. 420-422 [doi]
- An Adiabatic Sense and Set Rectifier for Improved Maximum-Power-Point Tracking in Piezoelectric Harvesting with 541% Energy Extraction GainYimai Peng, Kyojin David Choo, Sechang Oh, Inhee Lee, Tae-Kwang Jang, Yejoong Kim, Jongyup Lim, David T. Blaauw, Dennis Sylvester. 422-424 [doi]
- A Piezoelectric Energy-Harvesting Interface Using Split-Phase Flipping-Capacitor Rectifier and Capacitor Reuse Multiple-VCR SC DC-DC Achieving 9.3× Energy-Extraction ImprovementZhiyuan Chen 0002, Yang Jiang, Man Kay Law, Pui-In Mak, Xiaoyang Zeng, Rui P. Martins. 424-426 [doi]
- Multi-Beam Shared-Inductor Reconfigurable Voltage/SECE-Mode Piezoelectric Energy Harvesting of Multi-Axial Human MotionMiao Meng, Ahmed Ibrahim, Tiancheng Xue, Hong Goo Yeo, Dixiong Wang, Shad Roundy, Susan Trolier-McKinstry, Mehdi Kiani. 426-428 [doi]
- A 91%-Efficiency Envelope-Tracking Modulator Using Hysteresis-Controlled Three-Level Switching Regulator and Slew-Rate-Enhanced Linear Amplifier for LTE-80MHz ApplicationsParisa Mahmoudidaryan, Debashis Mandal, Bertan Bakkaloglu, Sayfe Kiaei. 428-430 [doi]
- Background Capacitor-Current-Sensor Calibration of DC-DC Buck Converter with DVS for Accurately Accelerating Load-Transient ResponseTai-Haur Kuo, Yi-Wei Huang, Pai-Yi Wang. 430-432 [doi]
- 2 Controller and 80ns Recovery TimeMinho Choi, Chan-Ho Kye, Jonghyun Oh, Min-Seong Choo, Deog Kyoon Jeong. 432-434 [doi]
- Dynamic-Charging Current-Scaling Technique with Dual Accurate Current Control and Temperature Loops with Charging-Current Accuracy up to 99.6% for 1.6× Faster Lithium-Ion Battery ChargingWei-Tin Lin, Zong-Yi Lin, Chia-Hao Liu, Chia-Ming Huang, Li-Cheng Chu, Ke-Horng Chen, Yin-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai, Hann-Huei Tsai, Ying-Zong Juang. 434-436 [doi]
- A 0.42nW 434MHz -79.1dBm Wake-Up Receiver with a Time-Domain IntegratorVivek Mangal, Peter R. Kinget. 438-440 [doi]
- A 220μW -85dBm Sensitivity BLE-Compliant Wake-up Receiver Achieving -60dB SIR via Single-Die Multi- Channel FBAR-Based Filtering and a 4-Dimentional Wake-Up SignaturePo-Han Peter Wang, Patrick P. Mercier. 440-442 [doi]
- 2 Loop Antenna and Transformer-Boost Power OscillatorYao Shi, Xing Chen, Hun-Seok Kim, David T. Blaauw, David D. Wentzloff. 442-444 [doi]
- A High-Q Resonant Inductive Link Transmit Modulator/Driver for Enhanced Power and FSK/PSK Data Transfer Using Adaptive-Predictive Phase-Continuous Switching Fractional-Capacitance TuningHenry Kennedy 0001, Rares Bodnar, Teerasak Lee, William Redman-White. 444-446 [doi]
- Non-Magnetic 60GHz SOI CMOS Circulator Based on Loss/Dispersion-Engineered Switched Bandpass FiltersAravind Nagulu, Harish Krishnaswamy. 446-448 [doi]
- Full-Duplex 2×2 MIMO Circulator-Receiver with High TX Power Handling Exploiting MIMO RF and Shared-Delay Baseband Self-Interference CancellationMahmood Baraani Dastjerdi, Sanket Jain, Negar Reiskarimian, Arun Natarajan, Harish Krishnaswamy. 448-450 [doi]
- A Wideband Blocker-Tolerant Receiver with High-Q RF-Input Selectivity and <-80dBm LO LeakageHuan Wang 0008, Zisong Wang, Payam Heydari. 450-452 [doi]
- A 21dBm-OP1dB 20.3%-Efficiency -131.8dBm/Hz-Noise X-Band Cartesian-Error-Feedback Transmitter with Fully Integrated Power Amplifier in 65nm CMOSJinbo Li, Zhiwei Xu, Qun Jane Gu. 452-454 [doi]
- A 28nm Bulk-CMOS 4-to-8GHz ¡2mW Cryogenic Pulse Modulator for Scalable Quantum ComputingJoseph C. Bardin, Evan Jeffrey, Erik Lucero, Trent Huang, Ofer Naaman, Rami Barends, Ted White, Marissa Giustina, Daniel Sank, Pedram Roushan, Kunal Arya, Benjamin Chiaro, Julian Kelly, Jimmy Chen, Brian Burkett, Yu Chen, Andrew Dunsworth, Austin Fowler, Brooks Foxen, Craig Gidney, Rob Graff, Paul Klimov, Josh Mutus, Matthew McEwen, Anthony Megrant, Matthew Neeley, Charles Neill, Chris Quintana, Amit Vainsencher, Hartmut Neven, John Martinis. 456-458 [doi]
- A Scalable Quantum Magnetometer in 65nm CMOS with Vector-Field Detection CapabilityMohamed I. Ibrahim, Christopher Foy, Dirk R. Englund, Ruonan Han 0001. 458-461 [doi]
- A 48GHz 5.6mW Gate-Level-Pipelined Multiplier Using Single-Flux Quantum LogicIkki Nagaoka, Masamitsu Tanaka, Koji Inoue, Akira Fujimaki. 460-462 [doi]
- -12 Long-Term Allan Deviation Using Cesium Coherent Population TrappingHaosheng Zhang, Hans Herdian, Aravind Tharayil Narayanan, Atsushi Shirane, Mitsuru Suzuki, Kazuhiro Harasaka, Kazuhiko Adachi, Shinya Yanagimachi, Kenichi Okada. 462-464 [doi]
- A Single-Chip Optical Phased Array in a 3D-Integrated Silicon Photonics/65nm CMOS TechnologyTaehwan Kim, Pavan Bhargava, Christopher V. Poulton, Jelena Notaros, Ami Yaacobi, Erman Timurdogan, Christopher Baiocco, Nicholas Fahrenkopf, Seth Kruger, Tat Ngai, Yukta Timalsina, Michael R. Watts, Vladimir Stojanovic. 464-466 [doi]
- A Digital-Type GaN Driver with Current-Pulse-Balancer Technique Achieving Sub-Nanosecond Current Pulse Width for High-Resolution and Dynamic Effective Range LiDAR SystemYu-Sheng Ma, Zong-Yi Lin, Yen-Ting Lin, Cheng-Yen Lee, Tzu-ping Huang, Ke-Horng Chen, Yin-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai. 466-468 [doi]
- A 500Mb/s -46.1dBm CMOS SPAD Receiver for Laser Diode Visible-Light CommunicationsJohn Kosman, Oscar Almer, Tarek Al Abbas, Neale A. W. Dutton, Richard J. Walker, Stefan Videv, Kevin Moore, Harald Haas, Robert K. Henderson. 468-470 [doi]
- SHARC: Self-Healing Analog with RRAM and CNFETsAya G. Amer, Rebecca Ho, Gage Hills, Anantha P. Chandrakasan, Max M. Shulaker. 470-472 [doi]
- Single-Pair Automotive PHY Solutions from 10Mb/s to 10Gb/s and BeyondGerrit W. den Besten. 474-476 [doi]
- A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFETGain Kim, Lukas Kull, Danny Luu, Matthias Braendli, Christian Menolfi, Pier Andrea Francese, Hazar Yueksel, Cosimo Aprile, Thomas Morf, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Andreas Burg, Thomas Toifl, Yusuf Leblebici. 476-478 [doi]
- A 25.6Gb/s Uplink-Downlink Interface Employing PAM-4-Based 4-Channel Multiplexing and Cascaded CDR Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage SystemsTakashi Toi, Junji Wadatsumi, Hiroyuki Kobayashi, Yutaka Shimizu, Yuji Satoh, Makoto Morimoto, Rui Ito, Mitsuyuki Ashida, Yuta Tsubouchi, Mai Nozawa, Go Urakawa, Jun Deguchi. 478-480 [doi]
- A 32Gb/s 2.9pJ/b Transceiver for Sequence-Coded PAM-4 Signalling with 4-to-6dB SNR Gain in 28nm FDSOI CMOSAurangozeb, Carson Dick, Maruf Mohammad, Masum Hossain. 480-482 [doi]
- A 1.41pJ/b 56Gb/s PAM-4 Wireline Receiver Employing Enhanced Pattern Utilization CDR and Genetic Adaptation Algorithms in 7nm CMOSShayan Shahramian, Behzad Dehlaghi, Joshua Liang, Ryan Bespalko, Dustin Dunwell, James Bailey, Bo Wang, Alireza Sharif Bakhtiar, Michael O'Farrell, Kerry Tang, Anthony Chan Carusone, David Cassan, Davide Tonietto. 482-484 [doi]
- A 6V Swing 3.6% THD >40GHz Driver with 4.5× Bandwidth Extension for a 272Gb/s Dual-Polarization 16-QAM Silicon Photonic TransmitterAbdelrahman H. Ahmed, Daihyun Lim, Abdellatif Elmoznine, Yangjin Ma, Tam N. Huynh, Christopher Williams, Leonardo Vera, Yang Liu, Ruizhi Shi, Matthew Streshinsky, Ari Novack, Ran Ding, Rick Younce, Rafid A. Sukkar, Jose Roman, Michael Hochberg, Sudip Shekhar, Alexander Rylyakov. 484-486 [doi]
- An 8b Injection-Locked Phase Rotator with Dynamic Multiphase Injection for 28/56/112Gb/s Serdes ApplicationYi-Chieh Huang, Bo-Jiun Chen. 486-488 [doi]
- A 0.65V 12-to-16GHz Sub-Sampling PLL with 56.4fsrms Integrated Jitter and -256.4dB FoMZhao Zhang, Guang Zhu, C. Patrick Yue. 488-490 [doi]
- A 140fsrms-Jitter and -72dBc-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Using a Background Triple-Point Frequency/Phase/Slope CalibratorSeyeon Yoo, Seojin Choi, Yongsun Lee, Taeho Seong, Younghyun Lim, Jaehyouk Choi. 490-492 [doi]