Stephen Sunter, Peter Sarson. A/MS benchmark circuits for comparing fault simulation, DFT, and test generation methods. In IEEE International Test Conference, ITC 2017, Fort Worth, TX, USA, October 31 - Nov. 2, 2017. pages 1-7, IEEE, 2017. [doi]
@inproceedings{SunterS17,
title = {A/MS benchmark circuits for comparing fault simulation, DFT, and test generation methods},
author = {Stephen Sunter and Peter Sarson},
year = {2017},
doi = {10.1109/TEST.2017.8242079},
url = {https://doi.org/10.1109/TEST.2017.8242079},
researchr = {https://researchr.org/publication/SunterS17},
cites = {0},
citedby = {0},
pages = {1-7},
booktitle = {IEEE International Test Conference, ITC 2017, Fort Worth, TX, USA, October 31 - Nov. 2, 2017},
publisher = {IEEE},
isbn = {978-1-5386-3413-4},
}