Application of Alpha Power Law Models to PLL Design Methodology

B. Suresh, V. Visvanathan, R. S. Krishnan, H. S. Jamadagni. Application of Alpha Power Law Models to PLL Design Methodology. In 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India. pages 768-773, IEEE Computer Society, 2005. [doi]

Authors

B. Suresh

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V. Visvanathan

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R. S. Krishnan

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H. S. Jamadagni

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