Impact of stress on various circuit characteristics in 65nm PDSOI technology

Sushant Suryagandh, Mayank Gupta, Zhiyuan Wu, Srinath Krishnan, Mario Pelella, Jung-Suk Goo, Ciby Thuruthiyil, Judy X. An, Brian Q. Chen, Niraj Subba, Luis Zamudio, James Yonemura, Ali B. Icel. Impact of stress on various circuit characteristics in 65nm PDSOI technology. In Doris Schmitt-Landsiedel, Tobias Noll, editors, 33rd European Solid-State Circuits Conference, ESSCIRC 2007, Munich, Germany, 11-13 September 2007. pages 119-122, IEEE, 2007. [doi]

@inproceedings{SuryagandhGWKPG07,
  title = {Impact of stress on various circuit characteristics in 65nm PDSOI technology},
  author = {Sushant Suryagandh and Mayank Gupta and Zhiyuan Wu and Srinath Krishnan and Mario Pelella and Jung-Suk Goo and Ciby Thuruthiyil and Judy X. An and Brian Q. Chen and Niraj Subba and Luis Zamudio and James Yonemura and Ali B. Icel},
  year = {2007},
  doi = {10.1109/ESSCIRC.2007.4430260},
  url = {https://doi.org/10.1109/ESSCIRC.2007.4430260},
  researchr = {https://researchr.org/publication/SuryagandhGWKPG07},
  cites = {0},
  citedby = {0},
  pages = {119-122},
  booktitle = {33rd European Solid-State Circuits Conference, ESSCIRC 2007, Munich, Germany, 11-13 September 2007},
  editor = {Doris Schmitt-Landsiedel and Tobias Noll},
  publisher = {IEEE},
  isbn = {978-1-4244-1125-2},
}