A low-power MTJ-based nonvolatile FPGA using self-terminated logic-in-memory structure

Daisuke Suzuki, Takahiro Hanyu. A low-power MTJ-based nonvolatile FPGA using self-terminated logic-in-memory structure. In Paolo Ienne, Walid A. Najjar, Jason Anderson, Philip Brisk, Walter Stechele, editors, 26th International Conference on Field Programmable Logic and Applications, FPL 2016, Lausanne, Switzerland, August 29 - September 2, 2016. pages 1-4, IEEE, 2016. [doi]

@inproceedings{SuzukiH16-0,
  title = {A low-power MTJ-based nonvolatile FPGA using self-terminated logic-in-memory structure},
  author = {Daisuke Suzuki and Takahiro Hanyu},
  year = {2016},
  doi = {10.1109/FPL.2016.7577345},
  url = {http://dx.doi.org/10.1109/FPL.2016.7577345},
  researchr = {https://researchr.org/publication/SuzukiH16-0},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {26th International Conference on Field Programmable Logic and Applications, FPL 2016, Lausanne, Switzerland, August 29 - September 2, 2016},
  editor = {Paolo Ienne and Walid A. Najjar and Jason Anderson and Philip Brisk and Walter Stechele},
  publisher = {IEEE},
  isbn = {978-2-8399-1844-2},
}