The following publications are possibly variants of this publication:
- Design of an MTJ-Based Nonvolatile LUT Circuit with a Data-Update Minimized Shift Operation for an Ultra-Low-Power FPGA: (Abstract Only)Daisuke Suzuki, Takahiro Hanyu. fpga 2018: 291 [doi]
- Fabrication of a 3000-6-input-LUTs embedded and block-level power-gated nonvolatile FPGA chip using p-MTJ-based logic-in-memory structureDaisuke Suzuki, Masanori Natsui, Akira Mochizuki, Sadahiko Miura, Hiroaki Honjo, Hideo Sato, Shunsuke Fukami, Shoji Ikeda, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu. vlsic 2015: 172 [doi]
- Three-terminal MTJ-based nonvolatile logic circuits with self-terminated writing mechanism for ultra-low-power VLSI processorTakahiro Hanyu, Daisuke Suzuki, Naoya Onizawa, Masanori Natsui. date 2017: 548-553 [doi]
- Design of an MTJ-based nonvolatile lookup table circuit using an energy-efficient single-ended logic-in-memory structureDaisuke Suzuki, Takahiro Hanyu. mwscas 2015: 1-4 [doi]