Novel VLIW code compaction method for a 3D geometry processor - researchr publication authors

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Hiroaki Suzuki, Hiroshi Making, Yoshio Matsuda. Novel VLIW code compaction method for a 3D geometry processor. In Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000. pages 555-558, IEEE, 2000. [doi]

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