Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut T. Kandemir. Design space exploration of workload-specific last-level caches. In Naresh R. Shanbhag, Massimo Poncino, Pai H. Chou, Ajith Amerasekera, editors, International Symposium on Low Power Electronics and Design, ISLPED'12, Redondo Beach, CA, USA - July 30 - August 01, 2012. pages 243-248, ACM, 2012. [doi]
Abstract is missing.