Péter Szántó, Béla Fehér. 3D rendering using FPGAs. In Manfred Glesner, Ricardo Augusto da Luz Reis, Hans Eveking, Vincent John Mooney III, Leandro Soares Indrusiak, Peter Zipf, editors, IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003. pages 149-154, Technische Universität Darmstadt, Insitute of Microelectronic Systems, 2003.
@inproceedings{SzantoF03,
title = {3D rendering using FPGAs},
author = {Péter Szántó and Béla Fehér},
year = {2003},
researchr = {https://researchr.org/publication/SzantoF03},
cites = {0},
citedby = {0},
pages = {149-154},
booktitle = {IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003},
editor = {Manfred Glesner and Ricardo Augusto da Luz Reis and Hans Eveking and Vincent John Mooney III and Leandro Soares Indrusiak and Peter Zipf},
publisher = {Technische Universität Darmstadt, Insitute of Microelectronic Systems},
isbn = {3-901882-17-0},
}