A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications

Ehsan Zhian Tabasy, Ayman Shafik, Keytaek Lee, Sebastian Hoyos, Samuel Palermo. A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications. J. Solid-State Circuits, 49(11):2560-2574, 2014. [doi]

@article{TabasySLHP14,
  title = {A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications},
  author = {Ehsan Zhian Tabasy and Ayman Shafik and Keytaek Lee and Sebastian Hoyos and Samuel Palermo},
  year = {2014},
  doi = {10.1109/JSSC.2014.2358568},
  url = {http://dx.doi.org/10.1109/JSSC.2014.2358568},
  researchr = {https://researchr.org/publication/TabasySLHP14},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {49},
  number = {11},
  pages = {2560-2574},
}