A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications

Ehsan Zhian Tabasy, Ayman Shafik, Keytaek Lee, Sebastian Hoyos, Samuel Palermo. A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications. J. Solid-State Circuits, 49(11):2560-2574, 2014. [doi]

Abstract

Abstract is missing.