Ramiro Taco, Itamar Levi, Marco Lanuzza, Alexander Fish. An 88-fJ/40-MHz [0.4 V]-0.61-pJ/1-GHz [0.9 V] Dual-Mode Logic 8 × 8 bit Multiplier Accumulator With a Self-Adjustment Mechanism in 28-nm FD-SOI. J. Solid-State Circuits, 54(2):560-568, 2019. [doi]
@article{TacoLLF19,
title = {An 88-fJ/40-MHz [0.4 V]-0.61-pJ/1-GHz [0.9 V] Dual-Mode Logic 8 × 8 bit Multiplier Accumulator With a Self-Adjustment Mechanism in 28-nm FD-SOI},
author = {Ramiro Taco and Itamar Levi and Marco Lanuzza and Alexander Fish},
year = {2019},
doi = {10.1109/JSSC.2018.2882139},
url = {https://doi.org/10.1109/JSSC.2018.2882139},
researchr = {https://researchr.org/publication/TacoLLF19},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {54},
number = {2},
pages = {560-568},
}