Farah Naz Taher, Mostafa Kishani, Benjamin Carrión Schäfer. Design and Optimization of Reliable Hardware Accelerators: Leveraging the Advantages of High-Level Synthesis. In Dimitris Gizopoulos, Dan Alexandrescu, Mihalis Maniatakos, Panagiota Papavramidou, editors, 24th IEEE International Symposium on On-Line Testing And Robust System Design, IOLTS 2018, Platja D'Aro, Spain, July 2-4, 2018. pages 232-235, IEEE, 2018. [doi]
@inproceedings{TaherKS18,
title = {Design and Optimization of Reliable Hardware Accelerators: Leveraging the Advantages of High-Level Synthesis},
author = {Farah Naz Taher and Mostafa Kishani and Benjamin Carrión Schäfer},
year = {2018},
doi = {10.1109/IOLTS.2018.8474222},
url = {https://doi.org/10.1109/IOLTS.2018.8474222},
researchr = {https://researchr.org/publication/TaherKS18},
cites = {0},
citedby = {0},
pages = {232-235},
booktitle = {24th IEEE International Symposium on On-Line Testing And Robust System Design, IOLTS 2018, Platja D'Aro, Spain, July 2-4, 2018},
editor = {Dimitris Gizopoulos and Dan Alexandrescu and Mihalis Maniatakos and Panagiota Papavramidou},
publisher = {IEEE},
isbn = {978-1-5386-5992-2},
}