Naofumi Takagi, Hiroto Yasuura, Shuzo Yajima. High-Speed VLSI Multiplication Algorithm with a Redundant Binary Addition Tree. IEEE Transactions on Computers, 34(9):789-796, 1985.
@article{TakagiYY85,
title = {High-Speed VLSI Multiplication Algorithm with a Redundant Binary Addition Tree},
author = {Naofumi Takagi and Hiroto Yasuura and Shuzo Yajima},
year = {1985},
researchr = {https://researchr.org/publication/TakagiYY85},
cites = {0},
citedby = {0},
journal = {IEEE Transactions on Computers},
volume = {34},
number = {9},
pages = {789-796},
}