A 6.7-fF//spl mu/m/sup 2/ bias-independent gate capacitor (BIGCAP) with digital CMOS process and its application to the loop filter of a differential PLL

Makoto Takamiya, Masayuki Mizuno. A 6.7-fF//spl mu/m/sup 2/ bias-independent gate capacitor (BIGCAP) with digital CMOS process and its application to the loop filter of a differential PLL. J. Solid-State Circuits, 40(3):719-725, 2005. [doi]

@article{TakamiyaM05,
  title = {A 6.7-fF//spl mu/m/sup 2/ bias-independent gate capacitor (BIGCAP) with digital CMOS process and its application to the loop filter of a differential PLL},
  author = {Makoto Takamiya and Masayuki Mizuno},
  year = {2005},
  doi = {10.1109/JSSC.2005.843620},
  url = {https://doi.org/10.1109/JSSC.2005.843620},
  researchr = {https://researchr.org/publication/TakamiyaM05},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {40},
  number = {3},
  pages = {719-725},
}