Masayuki Mizuno - researchr alias

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Viewing Publication 1 - 40 from 40

2019

Formal Verifications of Call-by-Need and Call-by-Name Evaluations with Mutual RecursionMasayuki Mizuno, Eijiro Sumii. aplas 2019: 181-201 [doi]

The numerical analysis of mass evacuation in Taipei 101 with control volume modelGuan-Yuan Wu, Masayuki Mizuno. simpra, 96, 2019. [doi]

2018

Formal Verification of the Correspondence Between Call-by-Need and Call-by-NameMasayuki Mizuno, Eijiro Sumii. FLOPS 2018: 1-16 [doi]

2013

A 5.5Gb/s 5mm contactless interface containing a 50Mb/s bidirectional sub-channel employing common-mode OOK signalingKen'ichiro Hijioka, Masaharu Matsudaira, Koichi Yamaguchi, Masayuki Mizuno. isscc 2013: 406-407 [doi]

2012

A 27% Active-Power-Reduced 40-nm CMOS Multimedia SoC With Adaptive Voltage Scaling Using Distributed Universal Delay LinesYoshifumi Ikenaga, Masahiro Nomura, Shuji Suenaga, Hideo Sonohara, Yoshitaka Horikoshi, Toshiyuki Saito, Yukio Ohdaira, Yoichiro Nishio, Tomohiro Iwashita, Miyuki Satou, Koji Nishida, Koichi Nose, Koichiro Noguchi, Yoshihiro Hayashi, Masayuki Mizuno. jssc, 47(4):832-840, 2012. [doi]

A 2.5 kV Isolation 35 kV/us CMR 250 Mbps Digital Isolator in Standard CMOS With a Small Transformer Driving TechniqueShunichi Kaeriyama, Shinichi Uchida, Masayuki Furumiya, Mitsuji Okada, Tadashi Maeda, Masayuki Mizuno. jssc, 47(2):435-443, 2012. [doi]

A 280nW, 100kHz, 1-cycle start-up time, on-chip CMOS relaxation oscillator employing a feedforward period control schemeTakashi Tokairin, Koichi Nose, Koichi Takeda, Koichiro Noguchi, Tadashi Maeda, Kazuyoshi Kawai, Masayuki Mizuno. vlsic 2012: 16-17 [doi]

2011

A Clock Generator with Clock Period, Duty-Ratio and I/Q-Balance Adjustment Capabilities for On-Chip Timing-Margin TestsShunichi Kaeriyama, Mikihiro Kajita, Masayuki Mizuno. ieicet, 94-C(1):102-109, 2011. [doi]

A Duobinary Signaling for Asymmetric Multi-Chip CommunicationKoichi Yamaguchi, Masayuki Mizuno. ieicet, 94-C(4):619-626, 2011. [doi]

Dicode Partial Response Signaling over Inductively-Coupled ChannelKoichi Yamaguchi, Masayuki Mizuno. ieicet, 94-C(4):613-618, 2011. [doi]

2010

2 , 27 Mbps 3 mW ADC/FFT-Less FDM BAN Receiver With Energy Exploitation CapabilityHaruya Ishizaki, Masayuki Mizuno. jssc, 45(4):921-927, 2010. [doi]

A Chip-Stacked Memory for On-Chip SRAM-Rich SoCs and ProcessorsHideaki Saito, Masayuki Nakajima, Takumi Okamoto, Yusuke Yamada, Akira Ohuchi, Noriyuki Iguchi, Toshitsugu Sakamoto, Koichi Yamaguchi, Masayuki Mizuno. jssc, 45(1):15-22, 2010. [doi]

A precise-tracking NBTI-degradation monitor independent of NBTI recovery effectEisuke Saneyoshi, Koichi Nose, Masayuki Mizuno. isscc 2010: 192-193 [doi]

st-Tap FFE and 3-Tap DFE in 90nm CMOSHideyuki Sugita, Kazuhisa Sunaga, Koichi Yamaguchi, Masayuki Mizuno. isscc 2010: 162-163 [doi]

A 6Gb/s receiver with discrete-time based channel filtering for wireline FDM communicationsTsutomu Takeya, Kazuhisa Sunaga, Koichi Yamaguchi, Hideyuki Sugita, Yoichi Yoshida, Masayuki Mizuno, Tadahiro Kuroda. cicc 2010: 1-4 [doi]

An Inductive-Coupling DC Voltage Transceiver for Highly Parallel Wafer-Level TestingYoichi Yoshida, Koichi Nose, Yoshihiro Nakagawa, Koichiro Noguchi, Yasuhiro Morita, Masamoto Tago, Masayuki Mizuno, Tadahiro Kuroda. jssc, 45(10):2057-2065, 2010. [doi]

2009

Introduction to the Special Issue on the 2008 Symposium on VLSI CircuitsKatsu Nakamura, Masayuki Mizuno. jssc, 44(4):1039-1040, 2009. [doi]

A chip-stacked memory for on-chip SRAM-rich SoCs and processorsHideaki Saito, Masayuki Nakajima, Takumi Okamoto, Yusuke Yamada, Akira Ohuchi, Noriyuki Iguchi, Toshitsugu Sakamoto, Koichi Yamaguchi, Masayuki Mizuno. isscc 2009: 60-61 [doi]

Basis-motion torque composition approach: generation of feedforward inputs for control of multi-joint robotsMasahiro Sekimoto, Sadao Kawamura, Tomoya Ishitsubo, Shinsuke Akizuki, Masayuki Mizuno. iros 2009: 3127-3132 [doi]

A 2.0Gb/s clock-embedded interface for full-HD 10b 120Hz LCD drivers with 1/5-rate noise-tolerant phase and frequency recoveryKoichi Yamaguchi, Yoshihiko Hori, Keiichi Nakajima, Kazumasa Suzuki, Masayuki Mizuno, Hiroshi Hayama. isscc 2009: 192-193 [doi]

A 2.0 Gb/s Clock-Embedded Interface for Full-HD 10-Bit 120 Hz LCD Drivers With 1/5-Rate Noise-Tolerant Phase and Frequency RecoveryKoichi Yamaguchi, Yoshihiko Hori, Keiichi Nakajima, Kazumasa Suzuki, Masayuki Mizuno, Hiroshi Hayama. jssc, 44(12):3560-3567, 2009. [doi]

Wireless DC voltage transmission using inductive-coupling channelfor highly-parallel wafer-level testingYoichi Yoshida, Koichi Nose, Yoshihiro Nakagawa, Koichiro Noguchi, Yasuhiro Morita, Masamoto Tago, Tadahiro Kuroda, Masayuki Mizuno. isscc 2009: 470-471 [doi]

2008

2007

2006

2005

A nonvolatile programmable solid-electrolyte nanometer switchShunichi Kaeriyama, Toshitsugu Sakamoto, Hiroshi Sunamura, Masayuki Mizuno, Hisao Kawaura, Tsuyoshi Hasegawa, Kazuya Terabe, Tomonobu Nakayama, Masakazu Aono. jssc, 40(1):168-176, 2005. [doi]

A 6.7-fF//spl mu/m/sup 2/ bias-independent gate capacitor (BIGCAP) with digital CMOS process and its application to the loop filter of a differential PLLMakoto Takamiya, Masayuki Mizuno. jssc, 40(3):719-725, 2005. [doi]

2004

Frequency-hopping vernier clock generators for multiple clock domain SoCsHiroshi Kodama, Masayuki Mizuno, Koichi Nose, Akio Tanaka. cicc 2004: 91-94 [doi]

2003

A 0.13-μm CMOS 5-Gb/s 10-m 28AWG cable transceiver with no-feedback-loop continuous-time post-equalizerYoshiharu Kudoh, Muneo Fukaishi, Masayuki Mizuno. jssc, 38(5):741-746, 2003. [doi]

2001

A 0.10 μm CMOS, 1.2 V, 2 GHz phase-locked loop with gain compensation VCOKoichiro Minami, Muneo Fukaishi, Masayuki Mizuno, Hideaki Onishi, Kenji Noda, Kiyotaka Imai, Tadahiko Horiuchi, Hiroshi Yamaguchi, Takanori Sato, Kazuyuki Nakamura, Masakazu Yaniashina. cicc 2001: 213-216 [doi]

1999

A 2000-MOPS embedded RISC processor with a Rambus DRAM controllerKazumasa Suzuki, Masayuki Daito, Tomoo Inoue, Kouhei Nadehara, Masahiro Nomura, Masayuki Mizuno, Tomofumi Iima, Shoichiro Sato, Terumi Fukuda, Tomohisa Arai, Ichiro Kuroda, Masakazu Yamashina. jssc, 34(7):1010-1021, 1999. [doi]

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1997

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