Koichiro Minami, Muneo Fukaishi, Masayuki Mizuno, Hideaki Onishi, Kenji Noda, Kiyotaka Imai, Tadahiko Horiuchi, Hiroshi Yamaguchi, Takanori Sato, Kazuyuki Nakamura, Masakazu Yaniashina. A 0.10 μm CMOS, 1.2 V, 2 GHz phase-locked loop with gain compensation VCO. In Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, CICC 2001, San Diego, CA, USA, May 6-9, 2001. pages 213-216, IEEE, 2001. [doi]
Abstract is missing.