Takashi Takenaka, Junji Kitamichi, Teruo Higashino, Kenichi Taniguchi. Formal Design Verification for Correctness of Pipelined Microprocessors with Out-of-order Instruction Execution. In Proceedings of the 1999 Conference on Asia South Pacific Design Automation, January 18-21, 1999, Wanchai, Hong Kong. pages 177-180, IEEE, 1999. [doi]
@inproceedings{TakenakaKHT99,
title = {Formal Design Verification for Correctness of Pipelined Microprocessors with Out-of-order Instruction Execution},
author = {Takashi Takenaka and Junji Kitamichi and Teruo Higashino and Kenichi Taniguchi},
year = {1999},
url = {http://csdl.computer.org/comp/proceedings/asp-dac/1999/2329/00/23290177abs.htm},
tags = {design},
researchr = {https://researchr.org/publication/TakenakaKHT99},
cites = {0},
citedby = {0},
pages = {177-180},
booktitle = {Proceedings of the 1999 Conference on Asia South Pacific Design Automation, January 18-21, 1999, Wanchai, Hong Kong},
publisher = {IEEE},
}