Tutorial T5: High Performance Low Power Designs - Challenges and Best practices in Design, Verification and Test - researchr publication authors

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Nagesh Tamarapalli, Prashanth Vallur, Sachin Kulkarni. Tutorial T5: High Performance Low Power Designs - Challenges and Best practices in Design, Verification and Test. In 28th International Conference on VLSI Design, VLSID 2015, Bangalore, India, January 3-7, 2015. pages 10-11, IEEE Computer Society, 2015. [doi]

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