Mikiko Sode Tanaka, Mikihiro Kajita, Naoya Nakayama, Satoshi Nakamoto. A method using circuit/substrate macro modeling to analyze substrate noise in a 3.2-GHz 350M-transistor microprocessor. In Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, CICC 2008, DoubleTree Hotel, San Jose, California, USA, September 21-24, 2008. pages 687-690, IEEE, 2008. [doi]
@inproceedings{TanakaKNN08,
title = {A method using circuit/substrate macro modeling to analyze substrate noise in a 3.2-GHz 350M-transistor microprocessor},
author = {Mikiko Sode Tanaka and Mikihiro Kajita and Naoya Nakayama and Satoshi Nakamoto},
year = {2008},
doi = {10.1109/CICC.2008.4672179},
url = {http://dx.doi.org/10.1109/CICC.2008.4672179},
researchr = {https://researchr.org/publication/TanakaKNN08},
cites = {0},
citedby = {0},
pages = {687-690},
booktitle = {Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, CICC 2008, DoubleTree Hotel, San Jose, California, USA, September 21-24, 2008},
publisher = {IEEE},
isbn = {978-1-4244-2018-6},
}