Mikiko Sode Tanaka, Mikihiro Kajita, Naoya Nakayama, Satoshi Nakamoto. A method using circuit/substrate macro modeling to analyze substrate noise in a 3.2-GHz 350M-transistor microprocessor. In Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, CICC 2008, DoubleTree Hotel, San Jose, California, USA, September 21-24, 2008. pages 687-690, IEEE, 2008. [doi]
Abstract is missing.