Yonghui Tang, Randall L. Geiger. A 2.5 Gbit/s CMOS PLL for data/clock recovery without frequency divider. In International Symposium on Circuits and Systems (ISCAS 2001), 6-9 May 2001, Sydney, Australia. pages 256-259, IEEE, 2001. [doi]
@inproceedings{TangG01,
title = {A 2.5 Gbit/s CMOS PLL for data/clock recovery without frequency divider},
author = {Yonghui Tang and Randall L. Geiger},
year = {2001},
doi = {10.1109/ISCAS.2001.921839},
url = {http://doi.ieeecomputersociety.org/10.1109/ISCAS.2001.921839},
researchr = {https://researchr.org/publication/TangG01},
cites = {0},
citedby = {0},
pages = {256-259},
booktitle = {International Symposium on Circuits and Systems (ISCAS 2001), 6-9 May 2001, Sydney, Australia},
publisher = {IEEE},
isbn = {0-7803-6685-9},
}