Liangxiao Tang, Weixin Gai, Linqi Shi, Xiao-xiang, Kai Sheng, Ai He. A 32Gb/s 133mW PAM-4 transceiver with DFE based on adaptive clock phase and threshold voltage in 65nm CMOS. In 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018. pages 114-116, IEEE, 2018. [doi]
@inproceedings{TangGSXSH18,
title = {A 32Gb/s 133mW PAM-4 transceiver with DFE based on adaptive clock phase and threshold voltage in 65nm CMOS},
author = {Liangxiao Tang and Weixin Gai and Linqi Shi and Xiao-xiang and Kai Sheng and Ai He},
year = {2018},
doi = {10.1109/ISSCC.2018.8310210},
url = {https://doi.org/10.1109/ISSCC.2018.8310210},
researchr = {https://researchr.org/publication/TangGSXSH18},
cites = {0},
citedby = {0},
pages = {114-116},
booktitle = {2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018},
publisher = {IEEE},
isbn = {978-1-5090-4940-0},
}