SEM-latch: a lost-cost and high-performance latch design for mitigating soft errors in nanoscale CMOS process

Zhong-Li Tang, Chia-Wei Liang, Ming-Hsien Hsiao, Charles H.-P. Wen. SEM-latch: a lost-cost and high-performance latch design for mitigating soft errors in nanoscale CMOS process. In Rob Oshana, editor, DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10 - 14, 2022. pages 865-870, ACM, 2022. [doi]

Abstract

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