A graph representation for programmable logic arrays to facilitate testing and logic design

Jing-Jou Tang, Kuen-Jong Lee, Bin-Da Liu. A graph representation for programmable logic arrays to facilitate testing and logic design. IEEE Trans. on CAD of Integrated Circuits and Systems, 17(10):1030-1043, 1998. [doi]

Authors

Jing-Jou Tang

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Kuen-Jong Lee

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Bin-Da Liu

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