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Jing-Jou Tang, Kuen-Jong Lee, Bin-Da Liu. A graph representation for programmable logic arrays to facilitate testing and logic design. IEEE Trans. on CAD of Integrated Circuits and Systems, 17(10):1030-1043, 1998. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: BIST-PLA: A Built-in Self-Test Design of Large Programmable Logic ArraysChun-Yeh Liu, Kewal K. Saluja, Shambhu J. Upadhyaya. dac 1987: 385-391 [doi]
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