Wenjun Tang, Mingyen Lee, Juejian Wu, Yixin Xu, Yao Yu, Yongpan Liu, Kai Ni 0004, Yu Wang 0002, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li. FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge. IEEE Trans. Circuits Syst. I Regul. Pap., 70(6):2398-2411, 2023. [doi]
@article{TangLWXYL00YNL23,
title = {FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge},
author = {Wenjun Tang and Mingyen Lee and Juejian Wu and Yixin Xu and Yao Yu and Yongpan Liu and Kai Ni 0004 and Yu Wang 0002 and Huazhong Yang and Vijaykrishnan Narayanan and Xueqing Li},
year = {2023},
doi = {10.1109/TCSI.2023.3251961},
url = {https://doi.org/10.1109/TCSI.2023.3251961},
researchr = {https://researchr.org/publication/TangLWXYL00YNL23},
cites = {0},
citedby = {0},
journal = {IEEE Trans. Circuits Syst. I Regul. Pap.},
volume = {70},
number = {6},
pages = {2398-2411},
}