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FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge

Wenjun Tang, Mingyen Lee, Juejian Wu, Yixin Xu, Yao Yu, Yongpan Liu, Kai Ni 0004, Yu Wang 0002, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li. FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge. IEEE Trans. Circuits Syst. I Regul. Pap., 70(6):2398-2411, 2023. [doi]

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