A efficient placement and global routing algorithm for hierarchical FPGAs

Jing-Jou Tang, Ping-Tsung Wang. A efficient placement and global routing algorithm for hierarchical FPGAs. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 729-732, IEEE, 2000. [doi]

@inproceedings{TangW00-1,
  title = {A efficient placement and global routing algorithm for hierarchical FPGAs},
  author = {Jing-Jou Tang and Ping-Tsung Wang},
  year = {2000},
  doi = {10.1109/ISCAS.2000.858855},
  url = {https://doi.org/10.1109/ISCAS.2000.858855},
  researchr = {https://researchr.org/publication/TangW00-1},
  cites = {0},
  citedby = {0},
  pages = {729-732},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings},
  publisher = {IEEE},
}