Mehri Teimoori, Amirali Amirsoleimani, Arash Ahmadi, Majid Ahmadi. A 2M1M Crossbar Architecture: Memory. IEEE Trans. VLSI Syst., 26(12):2608-2618, 2018. [doi]
@article{TeimooriAAA18,
title = {A 2M1M Crossbar Architecture: Memory},
author = {Mehri Teimoori and Amirali Amirsoleimani and Arash Ahmadi and Majid Ahmadi},
year = {2018},
doi = {10.1109/TVLSI.2018.2799951},
url = {https://doi.org/10.1109/TVLSI.2018.2799951},
researchr = {https://researchr.org/publication/TeimooriAAA18},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {26},
number = {12},
pages = {2608-2618},
}