VHDL fault simulation for defect-oriented test and diagnosis of digital ICs

João Paulo Teixeira, F. Celeiro, L. Dias, J. Ferreira, Marcelino B. Santos. VHDL fault simulation for defect-oriented test and diagnosis of digital ICs. In Graham Symonds, Wolfgang Nebel, editors, Proceedings of the conference on European design automation, EURO-DAC '96/EURO-VHDL '96, Geneva, Switzerland, September 16-20, 1996. pages 450-455, IEEE Computer Society Press, 1996. [doi]

Authors

João Paulo Teixeira

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F. Celeiro

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L. Dias

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J. Ferreira

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Marcelino B. Santos

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