João Paulo Teixeira, F. Celeiro, L. Dias, J. Ferreira, Marcelino B. Santos. VHDL fault simulation for defect-oriented test and diagnosis of digital ICs. In Graham Symonds, Wolfgang Nebel, editors, Proceedings of the conference on European design automation, EURO-DAC '96/EURO-VHDL '96, Geneva, Switzerland, September 16-20, 1996. pages 450-455, IEEE Computer Society Press, 1996. [doi]
Abstract is missing.