A Novel Half-Rate Dual-Response Phase Detector Implementation for a 25-28.3 Gb/s Clock and Data Recovery Circuit

Bortecene Terlemez, Burak Dundar. A Novel Half-Rate Dual-Response Phase Detector Implementation for a 25-28.3 Gb/s Clock and Data Recovery Circuit. In 25th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2018, Bordeaux, France, December 9-12, 2018. pages 45-48, IEEE, 2018. [doi]

Abstract

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