Efficient Software Architecture for IPSec Acceleration Using a Programmable Security Processor

Janar Thoguluva, Anand Raghunathan, Srimat T. Chakradhar. Efficient Software Architecture for IPSec Acceleration Using a Programmable Security Processor. In Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008. pages 1148-1153, 2008. [doi]

Abstract

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