The design of low power multiple-valued logic encoder and decoder circuits - researchr publication

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I. Thoidis, D. J. Soudris, Ioannis Karafyllidis, Adonios Thanailakis. The design of low power multiple-valued logic encoder and decoder circuits. In 6th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1999, Pafos, Cyprus, September 5-8, 1999. pages 1623-1626, IEEE, 1999. [doi]

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