Chih-Hui Ting, Juinn-Dar Huang, Yu-Hsiang Kao. Cycle-time-aware sequential way-access set-associative cache for low energy consumption. In IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2008, Macao, China, November 30 2008 - December 3, 2008. pages 854-857, IEEE, 2008. [doi]
Abstract is missing.