CMOS Transistor Sizing for Minimization of Energy-Delay Product

Christophe Tretz, Charles A. Zukowski. CMOS Transistor Sizing for Minimization of Energy-Delay Product. In 6th Great Lakes Symposium on VLSI (GLS-VLSI 96), March 22-23, 1996, Ames, IA, USA. pages 168-173, IEEE Computer Society, 1996. [doi]

@inproceedings{TretzZ96,
  title = {CMOS Transistor Sizing for Minimization of Energy-Delay Product},
  author = {Christophe Tretz and Charles A. Zukowski},
  year = {1996},
  url = {http://csdl.computer.org/comp/proceedings/glsvlsi/1996/7502/00/75020168abs.htm},
  researchr = {https://researchr.org/publication/TretzZ96},
  cites = {0},
  citedby = {0},
  pages = {168-173},
  booktitle = {6th Great Lakes Symposium on VLSI (GLS-VLSI  96), March 22-23, 1996, Ames, IA, USA},
  publisher = {IEEE Computer Society},
}