James D. Trotter, Johannes Langguth, Xing Cai. Cache simulation for irregular memory traffic on multi-core CPUs: Case study on performance models for sparse matrix-vector multiplication. J. Parallel Distrib. Comput., 144:189-205, 2020. [doi]
@article{TrotterLC20,
title = {Cache simulation for irregular memory traffic on multi-core CPUs: Case study on performance models for sparse matrix-vector multiplication},
author = {James D. Trotter and Johannes Langguth and Xing Cai},
year = {2020},
doi = {10.1016/j.jpdc.2020.05.020},
url = {https://doi.org/10.1016/j.jpdc.2020.05.020},
researchr = {https://researchr.org/publication/TrotterLC20},
cites = {0},
citedby = {0},
journal = {J. Parallel Distrib. Comput.},
volume = {144},
pages = {189-205},
}