A full-synthesizable high-precision built-in delay time measurement circuit

Ming-Chien Tsai, Ching-Hwa Cheng. A full-synthesizable high-precision built-in delay time measurement circuit. In Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009. pages 123-124, IEEE, 2009. [doi]

Authors

Ming-Chien Tsai

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Ching-Hwa Cheng

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