A full-synthesizable high-precision built-in delay time measurement circuit

Ming-Chien Tsai, Ching-Hwa Cheng. A full-synthesizable high-precision built-in delay time measurement circuit. In Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009. pages 123-124, IEEE, 2009. [doi]

@inproceedings{TsaiC09,
  title = {A full-synthesizable high-precision built-in delay time measurement circuit},
  author = {Ming-Chien Tsai and Ching-Hwa Cheng},
  year = {2009},
  doi = {10.1145/1509633.1509672},
  url = {http://doi.acm.org/10.1145/1509633.1509672},
  researchr = {https://researchr.org/publication/TsaiC09},
  cites = {0},
  citedby = {0},
  pages = {123-124},
  booktitle = {Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009},
  publisher = {IEEE},
  isbn = {978-1-4244-2748-2},
}